ADC12040_14 Datasheet, PDF (6/30 Pages) Texas Instruments – 12-Bit, 40 MSPS, 340mW A/D Converter with Internal Sample-and-Hold

ADC12040
SNAS135G – FEBRUARY 2001 – REVISED MARCH 2013
www.ti.com
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V_A = V_D = +5V, V_DR =
+3.0V, PD = 0V, V_REF = +2.0V, f_CLK = 40 MHz, t_r = t_f = 3 ns, C_L = 20 pF/pin. Boldface limits apply for T_A = T_J = T_MIN to T_MAX:
all other limits T_A = T_J = 25°C ^(1)(2)(3)
Symbol
Parameter
Conditions
Typical ⁽⁴⁾ Limits ⁽⁴⁾
Units
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
INL
Integral Non Linearity ⁽⁵⁾
12
Bits (min)
±0.7
±1.8
LSB (max)
DNL
Differential Non Linearity
±0.4
±1.0
LSB (max)
GE
Gain Error
±0.1
±2.1
%FS (max)
Offset Error (V_IN+ = V_IN−)
Under Range Output Code
−0.1
0
±0.9
%FS (max)
0
Over Range Output Code
4095
4095
DYNAMIC CONVERTER CHARACTERISTICS
FPBW Full Power Bandwidth
0 dBFS Input, Output at −3 dB
100
MHz
SNR
Signal-to-Noise Ratio
SINAD Signal-to-Noise and Distortion
ENOB Effective Number of Bits
THD
Total Harmonic Distortion
SFDR Spurious Free Dynamic Range
IMD
Intermodulation Distortion
f_IN 1 MHz, V_IN−0.5 dBFS
f_IN = 10 MHz, V_IN = −0.5 dBFS
f_IN = 1 MHz, V_IN = −0.5 dBFS
f_IN = 10 MHz, V_IN = −0.5 dBFS
f_IN = 1 MHz, V_IN = −0,5 dBFS
f_IN = 10 MHz, V_IN = −0,5 dBFS
f_IN = 1 MHz, V_IN = −0,5 dBFS
f_IN = 10 MHz, V_IN = −0,5 dBFS
f_IN = 1 MHz, V_IN = −0,5 dBFS
f_IN = 10 MHz, V_IN = −0.5 dBFS
f_IN = 9.5 MHz and 10.5 MHz, each = −8
dBFS
70
69.5
69.5
69
11.2
11.2
−82
−80
86
84
−75
dB
66.5
dB (min)
dB
66
dB (min)
Bits
10.7
Bits (min)
dB
−67
dB (max)
dB
68
dB (min)
dBFS
REFERENCE AND ANALOG INPUT CHARACTERISTICS
V_CM
Common Mode Input Voltage
V_A/2
V
(CLK LOW)
8
pF
C_IN
V_IN Input Capacitance (each pin to GND) V_IN = 2.5 Vdc + 0.7 V_{rms (CLK HIGH)}
7
pF
V_REF
Reference Voltage ⁽⁶⁾
1.0
V (min)
2.00
2.2
V (max)
Reference Input Resistance
100
MΩ (min)
(1) The inputs are protected as shown below. Input voltage magnitudes above V_A or below GND will not damage this device, provided
current is limited per ⁽⁾. However, errors in the A/D conversion can occur if the input goes above V_A or below GND by more than 100
mV. As an example, if V_A is 4.75V, the full-scale input voltage must be ≤4.85V to ensure accurate conversions. See Figure 1
(2) To ensure accuracy, it is required that |V_A–V_D| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
(3) With the test condition for V_REF = +2.0V (4V_P-P differential input), the 12-bit LSB is 977 µV.
(4) Typical figures are at T_A = T_J = 25°C, and represent most likely parametric norms. Test limits are specified to TI's AOQL (Average
Outgoing Quality Level).
(5) Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through
positive and negative full-scale.
(6) Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.2V range. The LM4051CIM3-ADJ (SOT-23
package) is recommended for this application.
6
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