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SM34020A Datasheet, PDF (59/94 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR
Not Recommended for New Designs
SM34020A
GRAPHICS SYSTEM PROCESSOR
SGUS057 − FEBRUARY 2005
cycle timing examples (continued)
The timing example in Figure 33 is like a memory write cycle except that RAS and SF are high.
Command
Data Transfer
Data Transfer
Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
LCLK1
LCLK2
GI
LAD (TMS34020A)
(see Note A)
LAD (Coprocessor)
(see Note A)
CAMD
Command
Operand 1
Operand 2
RCA
ALTCH
RAS
CAS
WE
TR / QE
SF
DDIN
DDOUT
LRDY
PGMD
SIZE16
BUSFLT
R0
R1
NOTE A: LAD (SM34020A):
LAD (coprocessor):
Command:
Operand n:
Output to LAD by the SM34020A
Output to LAD by the coprocessor
Coprocessor ID, instruction and status code present on LAD
Data to or from the coprocessor
Figure 33. Transfer-Coprocessor Register to SM34020A (One or Two 32-Bit Values)
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