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| TM4C1231H6PGE Datasheet, PDF (580/1192 Pages) Texas Instruments – Tiva™ TM4C1231H6PGE Microcontroller | |||
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Micro Direct Memory Access (μDMA)
Table 9-13. μDMA Register Map (continued)
Offset Name
Type
Reset
Description
0xFE4 DMAPeriphID1
0xFE8 DMAPeriphID2
0xFEC DMAPeriphID3
0xFF0 DMAPCellID0
0xFF4 DMAPCellID1
0xFF8 DMAPCellID2
0xFFC DMAPCellID3
RO
0x0000.00B2 DMA Peripheral Identification 1
RO
0x0000.000B DMA Peripheral Identification 2
RO
0x0000.0000 DMA Peripheral Identification 3
RO
0x0000.000D DMA PrimeCell Identification 0
RO
0x0000.00F0 DMA PrimeCell Identification 1
RO
0x0000.0005 DMA PrimeCell Identification 2
RO
0x0000.00B1 DMA PrimeCell Identification 3
See
page
613
614
615
617
618
619
620
9.5 μDMA Channel Control Structure
The μDMA Channel Control Structure holds the transfer settings for a μDMA channel. Each channel
has two control structures, which are located in a table in system memory. Refer to âChannel
Configurationâ on page 561 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. Each channel has a primary
and alternate structure. The primary control structures are located at offsets 0x0, 0x10, 0x20 and
so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and so on.
580
June 12, 2014
Texas Instruments-Production Data
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