TM4C1231H6PGE Datasheet, PDF (1170/1192 Pages) Texas Instruments – Tiva™ TM4C1231H6PGE Microcontroller

Electrical Characteristics
non-XOSCn pins). This section covers I/O pins with fail-safe ESD protection and I/O pins with
non-fail-safe ESD protection. Power I/O pin voltage and current limitations are specified in
“Recommended Operating Conditions” on page 1143.
21.13.2.1 Fail-Safe Pins
GPIOs other than PL6 and PL7, inputs for the Hibernate 32-kHz oscillator (XOSCn), and Hibernate
inputs use ESD protection as shown in Figure 21-16 on page 1170.
An unpowered device cannot be parasitically powered through any of these pins. This ESD protection
prevents a direct path between these I/O pads and any power supply rails in the device. GPIO/XOSCn
pad input voltages should be kept inside the maximum ratings specified in Table 21-1 on page 1141
to ensure current leakage and current injections are within acceptable range. Current leakages and
current injection for these pins are specified in Table 21-28 on page 1169.
Figure 21-16 on page 1170 shows a diagram of the ESD protection on fail-safe pins.
Some GPIOs when configured as inputs require a strong pull-up resistor to maintain a threshold
above the minimum value of VIH during power-on. See Table 21-30 on page 1171.
Figure 21-16. ESD Protection on Fail-Safe Pins
V_DD
I/O Pad
ESD
Clamp
GND
Table 21-29. Pad Voltage/Current Characteristics for Fail-Safe Pins^a
Parameter Parameter Name
Min Nom
Max
Unit
I_LKG+
GPIO input leakage current, V_DD< V_IN ≤ 4.5 V^bb
GPIO input leakage current, 4.5 V < V_IN ≤ 5.5 V^bc
-
-
-
-
700
100
µA
µA
I_LKG-
GPIO input leakage current, V_IN < -0.3 V^bd
GPIO input leakage current, -0.3 V ≤ V_IN < 0 V^b
-
-
-
-
-^e
10
µA
µA
I_INJ+
DC injection current, V_DD < V_IN ≤ 5.5 V^fg
-
-
I_LKG+
µA
I_INJ-
DC injection current, V_IN ≤ 0 V^g
-
-
0.5
mA
a. VIN must be within the range specified in Table 21-1 on page 1141.
b. To protect internal circuitry from over-voltage, the GPIOs have an internal voltage clamp that limits internal swings to V_DD
without affecting swing at the I/O pad. This internal clamp starts turning on while V_DD < V_IN < 4.5 V and causes a somewhat
larger (but bounded) current draw. To save power, static input voltages between V_DD and 4.5 V should be avoided.
c. Leakage current above maximum voltage (V_IN = 5.5V) is not guaranteed, this condition is not allowed and can result in
permanent damage to the device.
d. Leakage outside the minimum range (-0.3V) is unbounded and must be limited to IINJ- using an external resistor.
e. In this case, I_LKG- is unbounded and must be limited to I_INJ- using an external resistor.
1170
Texas Instruments-Production Data
June 12, 2014