TMS320_13 Datasheet, PDF (58/70 Pages) Texas Instruments – TMS320 SECOND GENERATION DIGITAL SIGNAL PROCESSORS

TMS320E25
SPRS010B — MAY 1987 — REVISED NOVEMBER 1990
programming the TMS320E25 EPROM cell
The TMS320E25 includes a 4K  16-bit EPROM, implemented from an industry-standard EPROM cell, to
perform prototyping and early field testing and to achieve low-volume production. When used with a 4K-word
masked-ROM TMS320C25, the TMS320E25 yields a high-volume, low-cost production as a result of more
migration paths for data. An EPROM adapter socket (part # TMDX3270120), shown in Figure 8, is available to
provide 68-pin to 28-pin conversion for programming the TMS320E25.
Figure 8. EPROM Adapter Socket
Key features of the EPROM cell include standard programming and verification. For security against copyright
violations, the EPROM cell features an internal protection mechanism to prevent proprietary code from being
read. The protection feature can be used to protect reading the EPROM contents. This section describes
erasure, fast programming and verification, and EPROM protection and verification.
fast programming and verification
The TMS320E25 EPROM cell is programmed using the same family and device codes as the TMS27C64
8K  8-bit EPROM. The TMS27C64 EPROM series are ultraviolet-light erasable, electrically programmable
read-only memories, fabricated using HVCMOS technology. The TMS27C64 is pin-compatible with existing
28-pin ROMs and EPROMs. The TMS320E25, like the TMS27C64, operates from a single 5-V supply in the
read mode; however, a 12.5-V supply is needed for programming. All programming signals are TTL level. For
programming outside the system, existing EPROM programmers can be used. Locations may be programmed
singly, in blocks, or at random. When programmed in blocks, the data is loaded into the EPROM cell one byte
at a time, the high byte first and the low byte second.
58
 POST OFFICE BOX 1443
HOUSTON, TEXAS 77001