TM4C1237D5PZ Datasheet, PDF (563/1306 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1237D5PZ Microcontroller
Register 30: Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x130
and 0x200
Note: The FMPRE0 register is aliased for backwards compatibility.
Note: Offset is relative to System Control base address of 0x400F.E000.
This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the
execute-only bits).
This register is loaded during the power-on reset sequence. The factory settings for the FMPREn
and FMPPEn registers are a value of 1 for all implemented 2-KB blocks. This achieves a policy of
open access and programmability. The register bits may be changed by writing the specific register
bit. However, this register is RW0; the user can only change the protection bit from a 1 to a 0 (and
may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved),
at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it
may be restored by executing a power-on reset sequence. The reset value shown only applies to
power-on reset; any other type of reset does not affect this register. Once committed, the only way
to restore the factory default value of this register is to perform the sequence detailed in “Recovering
a "Locked" Microcontroller” on page 200.
Each FMPREn register controls a 64-k block of Flash. For additional information, see “Flash Memory
Protection” on page 513.
■ FMPRE0: 0 to 64 KB
Flash Memory Protection Read Enable n (FMPREn)
Base 0x400F.E000
Offset 0x130 and 0x200
Type RW, reset 0xFFFF.FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
READ_ENABLE
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
READ_ENABLE
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit/Field
31:0
Name
READ_ENABLE
Type
Reset Description
RW 0xFFFF.FFFF Flash Read Enable
Each bit configures a 2-KB flash block to be read only.
The policies may be combined as shown in Table 8-1 on page 514.
June 12, 2014
563
Texas Instruments-Production Data