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TPS68470 Datasheet, PDF (53/105 Pages) Texas Instruments – Power Management Unit with LED Flash Driver and Reference Clock Generation for Compact Camera Module (CCM) Applications
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8.5.21 GPCTL2A Register (address = 0x18) [reset = 00000001]
TPS68470
SLVSCJ1A – SEPTEMBER 2014 – REVISED MARCH 2015
Figure 37. GPCTL2A Register Format
Data Bit
D7
D6
Field Name
DRV_STR[1:0]
Read/Write
R/W
R/W
Reset Value
0
0
LEGEND: R/W = Read/Write; R = Read only
D5
Not used
R
0
D4
Not used
R
0
D3
LEVEL
R/W
0
D2
DMODE
R/W
0
D1
D0
MODE_CTRL[1:0]
R/W
R/W
0
1
Bit Field
Bits [1:0] MODE_CTRL[1:0]
Bit 2
DMODE
Bit 3
LEVEL
Bits [5:4] Not used
Bits [7:6] DRV_STR[1:0]
Table 26. GPCTL2A Register Description
Type
R/W
R/W
R/W
R
R/W
Reset
01
0
0
00
00
Description
GPIO2 operation mode:
00: GPIO input
01: GPIO input, pull-up
10: GPIO output, CMOS (push-pull)
11: GPIO output, open-drain pull-down
GPIO2 drive mode when configured as an output (CMOS or open-
drain) via the MODE_CTRL[1:0] bits:
0: Voltage mode (only CMOS is supported)
1: Current mode (only open-drain is supported)
GPIO2 voltage level (applies to any of the MODE_CTRL[1:0] bit
settings):
0: LDO_IO level
1: 3V3_SUS level
GPIO2 current sink/drive strength value (applies to any of the
MODE_CTRL[1:0] bit settings):
00 : 1 mA
01 : 2 mA
10 : 4 mA
11 : 8 mA
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