LP87332B-Q1 Datasheet, PDF (53/73 Pages) Texas Instruments – Dual High-Current Buck Converter and Dual Linear Regulator

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Bits
Field
2 BUCK0_PGR_MAS
K
Type
R/W
1
Reserved
R
0
BUCK0_ILIM
R/W
_MASK
LP87332B-Q1
SNVSAT2 – JUNE 2017
Default
1*
0
1*
Description
Masking of Power Good valid detection for Buck0 power good interrupt
(BUCK0_PG_INT in INT_BUCK register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect BUCK0_PG_STAT status bit in BUCK_STAT register.
Masking for Buck0 current limit detection interrupt (BUCK0_ILIM_INT in INT_BUCK
register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect BUCK0_ILIM_STAT status bit in BUCK_STAT register.
7.6.1.36 LDO_MASK
Address: 0x23
D7
LDO1_PGF
_MASK
D6
LDO1_PGR
_MASK
D5
Reserved
D4
LDO1_ILIM
_MASK
D3
LDO0_PGF
_MASK
D2
LDO0_PGR
_MASK
D1
Reserved
D0
LDO0_ILIM
_MASK
Bits
Field
7 LDO1_PGF_MASK
Type
R/W
6 LDO1_PGR_MASK R/W
5
Reserved
R
4
LDO1_ILIM
R/W
_MASK
3 LDO0_PGF_MASK R/W
2 LDO0_PGR_MASK R/W
1
Reserved
R
0
LDO0_ILIM
R/W
_MASK
Default
1*
1*
0
1*
1*
1*
0
1*
Description
Masking of Power Good invalid detection for LDO1 power good interrupt
(LDO1_PG_INT in INT_LDO register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO1_PG_STAT status bit in LDO_STAT register.
Masking of Power Good valid detection for LDO1 power good interrupt
(LDO1_PG_INT in INT_LDO register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO1_PG_STAT status bit in LDO_STAT register.
Masking for LDO1 current limit detection interrupt (LDO1_ILIM_INT in INT_LDO
register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO1_ILIM_STAT status bit in LDO_STAT register.
Masking of Power Good invalid detection for LDO0 power good interrupt
(LDO0_PG_INT in INT_LDO register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO0_PG_STAT status bit in LDO_STAT register.
Masking of Power Good valid detection for LDO0 power good interrupt
(LDO0_PG_INT in INT_LDO register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO0_PG_STAT status bit in LDO_STAT register.
Masking for LDO0 current limit detection interrupt (LDO0_ILIM_INT in INT_LDO
register):
0 - Interrupt generated
1 - Interrupt not generated.
This bit does not affect LDO0_ILIM_STAT status bit in LDO_STAT register.
7.6.1.37 SEL_I_LOAD
Address: 0x24
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
LOAD_CURRE
NT_BUCK
_SELECT
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