TM4C1231E6PM_15 Datasheet, PDF (512/1145 Pages) Texas Instruments – Tiva™ TM4C1231E6PM Microcontroller

Internal Memory
Bit/Field
10
9
8:3
2
1
Name
INVDRIS
VOLTRIS
reserved
ERIS
PRIS
Type
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
Description
Invalid Data Raw Interrupt Status
Value Description
0 An interrupt has not occurred.
1 An interrupt is pending because a bit that was previously
programmed as a 0 is now being requested to be programmed
as a 1.
This bit is cleared by writing a 1 to the INVMISC bit in the FCMISC
register.
Pump Voltage Raw Interrupt Status
Value Description
0 An interrupt has not occurred.
1 An interrupt is pending because the regulated voltage of the
pump went out of spec during the Flash operation and the
operation was terminated.
This bit is cleared by writing a 1 to the VOLTMISC bit in the FCMISC
register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EEPROM Raw Interrupt Status
This bit provides status EEPROM operation.
Value Description
0 An EEPROM interrupt has not occurred.
1 An EEPROM interrupt has occurred.
This bit is cleared by writing a 1 to the EMISC bit in the FCMISC register.
Programming Raw Interrupt Status
This bit provides status on programming cycles which are write or erase
actions generated through the FMC or FMC2 register bits (see page 509
and page 519).
Value Description
0 The programming or erase cycle has not completed.
1 The programming or erase cycle has completed.
This status is sent to the interrupt controller when the PMASK bit in the
FCIM register is set.
This bit is cleared by writing a 1 to the PMISC bit in the FCMISC register.
512
June 12, 2014
Texas Instruments-Production Data