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TMS470R1B1M_12 Datasheet, PDF (50/60 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller
TMS470R1B1M
16/32-Bit RISC Flash Microcontroller
SPNS109A – SEPTEMBER 2005 – REVISED AUGUST 2006
EXPANSION BUS MODULE TIMING
Expansion Bus Timing Parameters
–40°C ≤ TJ≤ 150°C, 3.0 V ≤ V CC≤ 3.6 V (see Figure 20 and Figure 21)
tc(CO)
td(COH-EBADV)
th(COH-EBADIV)
td(COH-EBOE)
th(COH-EBOEH)
td(COL-EBWR)
th(COL-EBWRH)
tsu(EBRDATV-COH)
th(COH-EBRDATIV)
td(COL-EBWDATV)
th(COL-EBWDATIV)
Cycle time, CLKOUT
Delay time, CLKOUT high to EBADDR valid
Hold time, EBADDR invalid after CLKOUT high
Delay time, CLKOUT high to EBOE fall
Hold time, EBOE rise after CLKOUT high
Delay time, CLKOUT low to write strobe (EBWR) low
Hold time, EBWR high after CLKOUT low
Setup time, EBDATA valid before CLKOUT high (READ)(1)
Hold time, EBDATA invalid after CLKOUT high (READ)
Delay time, CLKOUT low to EBDATA valid (WRITE)(2)
Hold time, EBDATA invalid after CLKOUT low (WRITE)
SECONDARY TIMES
td(COH-EBCS0)
th(COH-EBCS0H)
tsu(COH-EBHOLDL)
tsu(COH-EBHOLDH)
Delay, CLKOUT high to EBCS0 fall
Hold, EBCS0 rise after CLKOUT high
Setup time, EBHOLD low to CLKOUT high(1)
Setup time, EBHOLD high to CLKOUT high(1)
(1) Setup time is the minimum time under worst case conditions. Data with less setup time will not work.
(2) Valid after CLKOUT goes low for write cycles.
tc(CO)
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MIN
MAX UNIT
20.8
ns
21.4 ns
12.4 ns
11.4 ns
11.4 ns
11.3 ns
11.6 ns
15.2
ns
(–14.7) ns
16.1 ns
14.7 ns
13.6 ns
13.2 ns
10.9
ns
10.5
ns
CLKOUT
EBADDR
EBDATA
td(COH-EBADV)
Valid
th(COH-EBADIV)
tsu(EBRDATV-COH)
Valid
th(COH-EBRDATIV)
EBOE
td(COH-EBOE)
th(COH-EBOEH)
EBCS0
EBHOLD
50
td(COH-EBCS0)
th(COH-EBCS0H)
tsu(COH-EBHOLDL)
tsu(COH-EBHOLDH)
1 Hold State
Figure 20. Expansion Memory Signal Timing - Reads
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