TPS650860_16 Datasheet, PDF (5/94 Pages) Texas Instruments – Configurable Multirail PMU for Multicore Processors

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NO.
NAME
SMPS REGULATORS
1
FBGND2
2
FBVOUT2
3
DRVH2
4
SW2
5
BOOT2
6
PGNDSNS2
7
DRVL2
8
DRV5V_2_A1
10
LX3
11
PVIN3
12
FB3
20
LX5
21
PVIN5
22
FB5
23
FB4
24
PVIN4
25
LX4
29
FBVOUT1
30
ILIM1
33
DRVH1
34
SW1
35
BOOT1
36
PGNDSNS1
37
DRVL1
38
DRV5V_1_6
39
DRVL6
40
PGNDSNS6
41
BOOT6
42
SW6
TPS650860
SWCS128A – MARCH 2015 – REVISED DECEMBER 2015
Pin Functions
I/O
DESCRIPTION
I
Remote negative feedback sense for BUCK2 controller. Connect to negative terminal of output
capacitor.
I
Remote positive feedback sense for BUCK2 controller. Connect to positive terminal of output
capacitor.
O High-side gate driver output for BUCK2 controller.
I Switch node connection for BUCK2 controller.
I
Bootstrap pin for BUCK2 controller. Connect a 100-nF ceramic capacitor between this pin and
SW2 pin.
I Power GND connection for BUCK2. Connect to ground terminal of external low-side FET.
O Low-side gate driver output for BUCK2 controller.
I
5-V supply to BUCK2 gate driver and LDOA1. Bypass to ground with a 2.2-µF (TYP) ceramic
capacitor. Shorted on board to LDO5P0 pin typically.
O Switch node connection for BUCK3 converter.
I Power input to BUCK3 converter. Bypass to ground with a 10-µF (TYP) ceramic capacitor.
I Remote feedback sense for BUCK3 converter. Connect to positive terminal of output capacitor.
O Switch node connection for BUCK5 converter.
I Power input to BUCK5 converter. Bypass to ground with a 10-µF (TYP) ceramic capacitor.
I Remote feedback sense for BUCK5 converter. Connect to positive terminal of output capacitor.
I Remote feedback sense for BUCK4 converter. Connect to positive terminal of output capacitor.
I Power input to BUCK4 converter. Bypass to ground with a 10-µF (TYP) ceramic capacitor.
O Switch node connection for BUCK4 converter.
I Remote feedback sense for BUCK1 controller. Connect to positive terminal of output capacitor.
I
Current limit set pin for BUCK1 controller. Fit a resistor from this pin to ground to set current
limit of external low-side FET.
O High-side gate driver output for BUCK1 controller.
I Switch node connection for BUCK1 controller.
I
Bootstrap pin for BUCK1 controller. Connect a 100-nF ceramic capacitor between this pin and
SW1 pin.
I Power GND connection for BUCK1. Connect to ground terminal of external low-side FET.
O Low-side gate driver output for BUCK1 controller.
I
5-V supply to BUCK1 and BUCK6 gate drivers. Bypass to ground with a 2.2-µF (TYP) ceramic
capacitor. Shorted on board to LDO5P0 pin typically.
O Low-side gate driver output for BUCK6 controller.
I Power GND connection for BUCK6. Connect to ground terminal of external low-side FET.
I
Bootstrap pin for BUCK6 controller. Connect a 100-nF ceramic capacitor between this pin and
SW6 pin.
I Switch node connection for BUCK6 controller.
Copyright © 2015, Texas Instruments Incorporated
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Pin Configuration and Functions
5