TMS470R1A384_15 Datasheet, PDF (5/63 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller

TMS470R1A384
www.ti.com ......................................................................................................................................................... SPNS110E – AUGUST 2005 – REVISED MAY 2008
DESCRIPTION
The TMS470R1A384⁽¹⁾ devices are members of the Texas Instruments TMS470R1x family of general-purpose
16/32-bit reduced instruction set computer (RISC) microcontrollers. The A384 microcontroller offers high
performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a
high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views
memory as a linear collection of bytes numbered upwards from zero. The A384 utilizes the big-endian format
where the most significant byte of a word is stored at the lowest-numbered byte and the least significant byte at
the highest-numbered byte.
High-end embedded control applications demand more performance from their controllers while maintaining low
costs. The A384 RISC core architecture offers solutions to these performance and cost demands while
maintaining low power consumption.
The A384 devices contain the following:
• ARM7TDMI 16/32-bit RISC CPU
• TMS470R1x system module (SYS) with 470+ enhancements
• 384K-byte flash
• 32K-byte SRAM
• Zero-pin phase-locked loop (ZPLL) clock module
• Analog watchdog (AWD) timer
• Enhanced real-time interrupt (RTI) module
• Interrupt expansion module (IEM)
• Two serial peripheral interface (SPI) modules
• Two serial communications interface (SCI) modules
• Two standard CAN controllers (SCC)
• Three inter-integrated circuit (I2C) modules
• Class II serial interface B (C2SIb) module
• 10-bit multi-buffered analog-to-digital converter (MibADC), with 12 input channels
• High-end timer (HET) controlling 12 I/Os
• External clock prescale (ECP)
• Expansion bus module (EBM)
• Up to 87 I/O pins and 1 input-only pin (PGE suffix only), up to 51 I/O pins and 1 input-only pin (PZ suffix only)
The functions performed by the 470+ system module (SYS) include:
• Address decoding
• Memory protection
• Memory and peripherals bus supervision
• Reset and abort exception management
• Prioritization for all internal interrupt sources
• Device clock control
• Parallel signature analysis (PSA)
The enhanced real-time interrupt (RTI) module on the A384 has the option to be driven by the oscillator clock.
This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt
priority, and a device memory map. For a more detailed functional description of the SYS module, see the
TMS470R1x System Module Reference Guide (literature number SPNU189).
The A384 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte,
half-word, and word modes.
The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented
with a 32-bit-wide data bus interface. The flash operates with a system clock frequency of up to 24 MHz. When
in pipeline mode, the flash operates with a system clock frequency of up to 48 MHz. For more detailed
information on the flash, see the Flash section of this data sheet and the TMS470R1x F05 Flash Reference
Guide (literature number SPNU213).
(1) Throughout the remainder of this document, the TMS470R1A384 is referred to as either the full device name or as A384.
Copyright © 2005–2008, Texas Instruments Incorporated
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