PTD08D210W Datasheet, PDF (5/19 Pages) Texas Instruments – DUAL 10-A OUTPUTS, 4.75-V to 14-V INPUT, NON-ISOLATED, DIGITAL POWERTRAIN™ MODULE

PTD08D210W
www.ti.com
SLTS295B – DECEMBER 2009 – REVISED DECEMBER 2010
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
DESCRIPTION
V_I
PGND
1, 2 The positive input voltage power node to the module, which is referenced to common GND.
3, 8, 9, 19,
20
The common ground connection for the V_I and V_O power connections.
V_OA
V_OB
I_SENSE-A
I_SENSE-B
PWM-A
21, 22
10, 11
14
6
18
The regulated positive power A output with respect to GND.
The regulated positive power B output with respect to GND.
Current sense A output. The voltage level on this pin represents the average output current of the module.
Current sense B output. The voltage level on this pin represents the average output current of the module.
This is the PWM A input pin. It is a high impedance digital input that accepts 3.3-V or 5-V logic level signals up to
1 MHz.
PWM-B
4
This is the PWM B input pin. It is a high impedance digital input that accepts 3.3-V or 5-V logic level signals up to
1 MHz.
FF-A
Current limit fault flag A. The Fault signal is a 3.3-V digital output which is latched high after an over-current
15
condition. The Fault is reset after a complete PWM cycle without an over-current condition (falling edge of the
PWM).
FF-B
Current limit fault flag A. The Fault signal is a 3.3-V digital output which is latched high after an over-current
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condition. The Fault is reset after a complete PWM cycle without an over-current condition (falling edge of the
PWM).
SRE-A
Synchronous Rectifier Enable A. This pin is a high impedance digital input. A 3.3 V or 5 V logic level signals is used
17
to enable the synchronous rectifier switch. When this signal is high, the module will source and sink output current.
When this signal is low, the module will only source current.
SRE-B
Synchronous Rectifier Enable B. This pin is a high impedance digital input. A 3.3 V or 5 V logic level signals is used
5
to enable the synchronous rectifier switch. When this signal is high, the module will source and sink output current.
When this signal is low, the module will only source current.
AGND
T_SENSE
Thermal
Pad
12, 13
16
Analog ground return. It is the 0 V_dc reference for the control inputs.
Temperature sense output. The voltage level on this pin represents the temperature of the module.
This pad is electrically connected to PGND and is the primary thermal conduction cooling path for the module. This
pad should be soldered to a grounded copper pad on the host board. For optimum cooling performance, the
grounded copper pad should also be tied with multiple vias to the host board internal ground plane. See the Land
Pattern drawing for package EFS for recommended pad dimensions.
XX
XX
TOP VIEW
BOTTOM VIEW
V_I
V_I 2
PGND ₃
PWM-B ₄
SRE-B 5
I_SENSE-B
6
FF-B 7
PGND ₈
PGND ₉
V_{O-B 10}
V_O-B ¹¹
22 ^V_O-A
21 ^VO-A
20 ^PGND
PGND
19
18 ^PWM-A
17 ^SRE-A
16 ^T_SENSE
FF-A
15
14 ^ISENSE-A
13 AGND
12 ^AGND
22
21
2
20
3
19
4
18
5
17
6
16
7
15
8
Thermal
14
Pad
9
13
10
12
11
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