DS90C383_11 Datasheet, PDF (5/22 Pages) Texas Instruments – +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
TRANSMITTER SUPPLY CURRENT
ICCTG Transmitter Supply Current
16 Grayscale
ICCTZ Transmitter Supply Current
Power Down
RECEIVER SUPPLY CURRENT
ICCRW Receiver Supply Current
Worst Case
ICCRG Receiver Supply Current,
16 Grayscale
ICCRZ Receiver Supply Current
Power Down
Conditions
Min
Typ Max Units
(Figures 1, 3 ), T_A =
−40˚C to +85˚C
f = 65 MHz
R_L = 100Ω,
C_L = 5 pF,
16 Grayscale Pattern
f = 32.5 MHz
f = 37.5 MHz
(Figures 2, 3 ), T_A =
−40˚C to +85˚C
f = 65 MHz
Power Down = Low
Driver Outputs in TRI-STATE^® under
Power Down Mode
42
55
mA
23
35
mA
28
40
mA
31
45
mA
10
55
µA
C _L = 8 pF,
Worst Case Pattern
f = 32.5 MHz
f = 37.5 MHz
(Figures 1, 4 ), T_A =
−40˚C to +85˚C
f = 65 MHz
C _L = 8 pF,
16 Grayscale Pattern
f = 32.5 MHz
f = 37.5 MHz
(Figures 2, 4 ), T_A =
−40˚C to +85˚C
f = 65 MHz
Power Down = Low
Receiver Outputs Stay Low during
Power Down Mode
49
65
mA
53
70
mA
78
105
mA
28
45
mA
30
47
mA
43
60
mA
10
55
µA
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Note 2: Typical values are given for V_CC = 3.3V and T_A = +25C.
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground unless otherwise
specified (except V_OD and ∆V_OD).
Note 4: V_OS previously referred as V_CM.
Transmitter Switching Characteristics
Over recommended operating supply and −40˚C to +85˚C ranges unless otherwise specified
Symbol
Parameter
LLHT
LVDS Low-to-High Transition Time (Figure 3 )
LHLT
LVDS High-to-Low Transition Time (Figure 3 )
TCIT
TxCLK IN Transition Time (Figure 5 )
TCCS
TxOUT Channel-to-Channel Skew (Figure 6 )
TPPos0 Transmitter Output Pulse Position for Bit 0 (Figure 17 )
f = 65 MHz
TPPos1 Transmitter Output Pulse Position for Bit 1
TPPos2 Transmitter Output Pulse Position for Bit 2
TPPos3 Transmitter Output Pulse Position for Bit 3
TPPos4 Transmitter Output Pulse Position for Bit 4
TPPos5 Transmitter Output Pulse Position for Bit 5
TPPos6 Transmitter Output Pulse Position for Bit 6
TCIP
TxCLK IN Period (Figure 7)
TCIH
TxCLK IN High Time (Figure 7)
TCIL
TxCLK IN Low Time (Figure 7)
TSTC
TxIN Setup to TxCLK IN (Figure 7 )
f = 65 MHz
THTC
TxIN Hold to TxCLK IN (Figure 7 )
TCCD
TxCLK IN to TxCLK OUT Delay 25˚C, V_CC = 3.3V (Figure 9 )
Min
−0.4
1.8
4.0
6.2
8.4
10.6
12.8
15
0.35T
0.35T
2.5
0
3.0
Typ
0.75
0.75
250
0
2.2
4.4
6.6
8.8
11
13.2
T
0.5T
0.5T
3.7
Max
1.5
1.5
5
0.3
2.5
4.7
6.9
9.1
11.3
13.5
50
0.65T
0.65T
5.5
Units
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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