DS10CP152 Datasheet, PDF (5/15 Pages) National Semiconductor (TI) – 1.5 Gbps 2X2 LVDS Crosspoint Switch

DS10CP152
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SNLS261D – OCTOBER 2007 – REVISED MAY 2011
AC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified. ⁽¹⁾⁽²⁾
Symbol
Parameter
Conditions
Min Typ Max Units
t_SKD3
Part to Part Skew
(3) (6)
45
190
ps
t_LHT
Rise Time ⁽³⁾
t_HLT
Fall Time ⁽³⁾
t_ON
Output Enable Time
t_OFF
Output Disable Time
t_SEL
Select Time
JITTER PERFORMANCE ⁽³⁾
R_L = 100Ω
170 350
ps
170 350
ps
5
20
μs
3
12
ns
3
12
ns
t_RJ1
V_ID = 350 mV
135 MHz
t_RJ2
Random Jitter (RMS Value) ⁽⁷⁾
V_CM = 1.2V
Clock (RZ)
311 MHz
t_RJ3
503 MHz
t_RJ4
750 MHz
t_DJ1
V_ID = 350 mV
270 Mbps
t_DJ2
t_DJ3
Deterministic Jitter (Peak-to-Peak
Value )⁽⁸⁾
V_CM = 1.2V
Clock (RZ)
622 Mbps
1.06 Gbps
t_DJ4
1.5 Gbps
t_TJ1
V_ID = 350 mV
270 Mbps
t_TJ2
Total Jitter (Peak to Peak Value) ⁽⁹⁾
V_CM = 1.2V
PRBS-23 (NRZ)
622 Mbps
t_TJ3
1.06 Gbps
t_TJ4
1.5 Gbps
0.5
0.5
0.5
0.5
9
7
7
9
0.01
0.01
0.01
0.01
1.2
1.2
1.2
1.2
38
36
34
35
0.03
0.04
0.05
0.07
ps
ps
ps
ps
ps
ps
ps
ps
UI_P-P
UI_P-P
UI_P-P
UI_P-P
(6) t_SKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same V_CC and within 5°C of each other within the operating temperature range.
(7) Measured on a clock edge with a histogram and an accumulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.
(8) Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is
subtracted algebraically.
(9) Measured on an eye diagram with a histogram and an accumulation of 3500 histogram hits. Input stimulus jitter is subtracted.
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