CD74HC125-Q1 Datasheet, PDF (5/13 Pages) Texas Instruments – HIGH-SPEED CMOS LOGIC QUAD BUFFER WITH 3-STATE OUTPUTS

CD74HC125-Q1
HIGH-SPEED CMOS LOGIC
QUAD BUFFER WITH 3-STATE OUTPUTS
SCLS579A − APRIL 2004 − REVISED SEPTEMBER 2008
PARAMETER MEASUREMENT INFORMATION
Test
From Output ^{Point RL}
Under Test
C_L
(see Note A)
V_CC
S1
S2
PARAMETER R_L
t_PZH
t_en
1 kΩ
t_PZL
t_dis
t_{PHZ 1 kΩ}
t_PLZ
C_L
50 pF
50 pF
S1
Open
Closed
Open
Closed
S2
Closed
Open
Closed
Open
LOAD CIRCUIT
t_pd or t_t
−− 50 pF Open Open
Input
In-Phase
Output
Out-of-Phase
Output
50%
t_PLH
50%
10%
t_PHL
90%
90%
t_r
50%
10%
t_f
50%
t_PHL
90%
t_PLH
50%
10%
V_CC
0V
V_OH
50%
10% _VOL
t_f
90% ^VOH
V_OL
t_r
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
Input 50%
10%
90%
t_r
90%
V_CC
50%
10% _{0 V}
t_f
Output
Control
(Low-Level
Enabling)
t_PZL
Output
Waveform 1
(See Note B)
t_PZH
Output
Waveform 2
(See Note B)
50%
50%
≈V_CC
50%
50%
V_CC
t_PLZ
0V
≈V_CC
10%
t_PHZ
90%
V_OL
V_OH
≈0 V
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. C_L includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z_O = 50 Ω, t_r = 6 ns, t_f = 6 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PLH and t_PHL are the same as t_pd.
Figure 1. Load Circuit and Voltage Waveforms
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