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CD74FCT651 Datasheet, PDF (5/11 Pages) Texas Instruments – BiCMOS FCT Interface Logic, Octal Bus Transceivers/Registers, Three-State
◁
CD74FCT651, CD74FCT652
Switching Specifications Over Operating Range FCT Series tr, tf = 2.5ns, CL = 50pF, RL (Figure 4)
25oC
0oC TO 70oC
Propagation Delays
PARAMETER
SYMBOL VCC (V) TYP
MIN
MAX
Stored An → Bn
Stored An → Bn
Stored Bn → An
Stored Bn → An
An → Bn
An → Bn
Bn → An
Bn → An
Select to Data
CD74FCT651
tPLH, tPHL
5
6.8
2
9
CD74FCT652
tPLH, tPHL
5
6.8
2
9
CD74FCT651
tPLH, tPHL
5
6.8
2
9
CD74FCT652
tPLH, tPHL
5
6.8
2
9
CD74FCT651
tPLH, tPHL
5
6.8
2
9
CD74FCT652
tPLH, tPHL
5
6.8
2
9
CD74FCT651
tPLH, tPHL
5
6.8
2
9
CD74FCT652
tPLH, tPHL
5
6.8
2
9
CD74FCT651,
tPLH, tPHL
5
8.3
2
11
CD74FCT652
Three-State Enabling Time,
Bus to Output or Register to Output
CD74FCT651,
tPZL, tPZH
5
7.5
2
10
CD74FCT652
Three-State Disabling Time,
Bus to Output or Register to Output
CD74FCT651,
tPLZ, tPHZ
5
7.5
2
10
CD74FCT652
Power Dissipation Capacitance
Minimum (Valley) VOHV During Switching of
Other Outputs (Output Under Test Not Switching)
Maximum (Peak) VOLP During Switching of
Other Outputs (Output Under Test Not Switching)
CPD
−
(Note 8)
VOHV
5
VOLP
5
0.5 Typical at 25oC
1 Typical at 25oC
Input Capacitance
Input/Output Capacitance
NOTE:
CI
CI/O
-
-
-
10
-
-
-
15
8.
CPD, measured per
PD (per package) =
flip-flop, is used to determine the
VCC ICC + Σ(VCC2 fI CPD + VO2
dynamic power consumption.
fO CL + VCC ∆ICC D) where:
VCC = supply voltage
∆ICC = flow through current x unit load
CL = output load capacitance
D = duty cycle of input high
fO = output frequency
fI = input frequency
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
V
V
pF
pF
Prerequisite for Switching
PARAMETER
Maximum Frequency
SYMBOL
fMAX
Data to Clock Setup Time
tSU
Data to Clock Hold Time
tH
Clock Pulse Width
tW
NOTE:
9. 5V: Minimum is at 4.75V for 0oC to 70oC, Typical is at 5V.
VCC (V)
5
(Note 9)
5
5
5
25oC
TYP
-
-
-
-
0oC TO 70oC
MIN
MAX
85
-
4
-
2
-
6
-
UNITS
MHz
ns
ns
ns
8-5
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