CD54HC4316_14 Datasheet, PDF (5/23 Pages) Texas Instruments – High-Speed CMOS Logic Quad Analog Switch with Level Translation

CD54HC4316, CD74HC4316, CD74HCT4316
DC Electrical Specifications (Continued)
TEST CONDITIONS
25^oC
-40^oC TO
85^oC
-55^oC TO
125^oC
PARAMETER SYMBOL
Control Input Leakage
I_I
Current
V_I (V)
V_CC or
GND
V_IS (V)
-
V_EE (V) V_CC (V) MIN
0
5.5
-
TYP MAX MIN MAX MIN MAX UNITS
- ±0.1 -
±1
-
±1 µA
Quiescent Device
Current
I_O = 0
I_CC
Any
When
0
5.5
-
-
8
-
80
- 160 µA
Voltage V_IS = V_EE,
Be-
V_OS =
-4.5
5.5
-
-
16
- 160 - 320 µA
tween V_CC,
V_CCand When
GND V_IS = V_CC,
V_OS = V_EE
Additional Quiescent
∆I_CC
V_CC
-
Device Current Per (Note 2) -2.1
Input Pin: 1 Unit Load
-
4.5 to - 100 360 - 450 - 490 µA
5.5
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
All
0.5
NOTE:
360µA
mUanxitaLto2a5d^{oiCs.∆ICC}
limit
specified
in
DC
Electrical
Table,
e.g.,
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
SYMBOL
TEST
V_EE
CONDITIONS (V)
V_CC
(V)
25^oC
MIN TYP MAX
-40^oC TO
85^oC
MIN MAX
-55^oC TO
125^oC
MIN MAX UNITS
HC TYPES
Propagation Delay,
Switch In to Out
t_PLH, t_PHL C_L = 50pF
0
2
-
0 4.5 -
-
60
-
75
-
90
ns
-
12
-
15
-
18
ns
0
6
-
-
10
-
13
-
15
ns
-4.5 4.5 -
-
8
-
10
-
12
ns
Turn “ON” Time E to Out
t_PZH, t_PZL C_L = 50pF
0
2
-
0 4.5 -
- 205 - 255 - 310 ns
-
41
-
51
-
62
ns
0
6
-
-
35
-
43
-
53
ns
-4.5 4.5 -
-
37
-
47
-
56
ns
Turn “ON” Time nS to Out
t_PZH, t_PZL
C_L = 15pF
C_L = 50pF
-
5
-
0
2
-
0 4.5 -
17 -
-
-
-
-
ns
- 175 - 220 - 265 ns
-
35
-
44
-
53
ns
0
6
-
-
30
-
37
-
45
ns
-4.5 4.5 -
-
34
-
43
-
51
ns
Turn “OFF” Time E to Out
t_PLZ, t_PHZ
C_L = 15pF
C_L = 50pF
-
5
-
0
2
-
0 4.5 -
14 -
-
-
-
-
ns
- 205 - 255 - 310 ns
-
41
-
51
-
62
ns
0
6
-
-
35
-
43
-
53
ns
-4.5 4.5 -
-
37
-
47
-
56
ns
C_L = 15pF
-
5
- 17 -
-
-
-
-
ns
5