ADS8555_14 Datasheet, PDF (5/37 Pages) Texas Instruments – 16-Bit, Six-Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER

ADS8555
www.ti.com
SBAS531B – DECEMBER 2010 – REVISED FEBRUARY 2011
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating free-air temperature range of –40°C to +125°C, AVDD = 4.5V to 5.5V, BVDD = 2.7V to 5.5V,
HVDD = 10V to 15V, HVSS = –15V to –10V, V_REF = 2.5V (internal), and f_DATA = maximum, unless otherwise noted.
ADS8555
PARAMETER
CONDITIONS
MIN
TYP ⁽¹⁾
MAX UNIT
DIGITAL OUTPUTS⁽⁵⁾
Logic family
CMOS
High-level output voltage
Low-level output voltage
High-impedance-state output current
I_OH = 100μA
I_OH = –100μA
BVDD – 0.6
BGND
–50
BVDD
V
BGND + 0.4
V
50
nA
Output capacitance
5
pF
Load capacitance
30
pF
POWER-SUPPLY REQUIREMENTS
Analog supply voltage
AVDD
4.5
5.0
5.5
V
Buffer I/O supply voltage
BVDD
2.7
3.0
5.5
V
Input positive supply voltage
HVDD
5.0
10.0
16.5
V
Input negative supply voltage
HVSS
–16.5
–10.0
–5.0
V
Analog supply current⁽⁶⁾
f_DATA = maximum
f_DATA = 250kSPS (auto-NAP mode)
IAVDD _{Auto-NAP mode, no ongoing conversion,}
internal conversion clock
30.0
36.0
mA
14.0
16.5
mA
4.0
6.0
mA
Power-down mode
0.1
50.0
μA
Buffer I/O supply current⁽⁷⁾
f_DATA = maximum
f_DATA = 250kSPS (auto-NAP mode)
IBVDD _{Auto-NAP mode, no ongoing conversion,}
internal conversion clock
0.9
2.0
mA
0.5
1.5
mA
0.1
10.0
μA
Power-down mode
0.1
10.0
μA
Input positive supply current⁽⁸⁾
f_DATA = maximum
f_DATA = 250kSPS (auto-NAP mode)
IHVDD _{Auto-NAP mode, no ongoing conversion,}
internal conversion clock
3.0
3.5
mA
1.6
2.0
mA
0.2
0.3
μA
Power-down mode
0.1
10.0
μA
Input negative supply current⁽⁹⁾
f_DATA = maximum
f_DATA = 250kSPS (auto-NAP mode)
IHVSS _{Auto-NAP mode, no ongoing conversion,}
internal conversion clock
3.6
4.0
mA
1.8
2.2
mA
0.2
0.25
μA
Power-down mode
0.1
10.0
μA
Power dissipation⁽¹⁰⁾
f_DATA = maximum
f_DATA = 250kSPS (auto-NAP mode)
Auto-NAP mode, no ongoing conversion,
internal conversion clock
251.7
122.5
26.0
298.5
mW
150.0
mW
38.3
mW
Power-down mode
3.8
580.0
μW
(5) Specified by design.
(6) At AVDD = 5V.
(7) At BVDD = 3V, parallel mode, load capacitance = 6pF/pin.
(8) At HVDD = 15V.
(9) At HVSS = –15V.
(10) At AVDD = 5V, BVDD = 3V, HVDD = 15V, and HVSS = –15V.
© 2010–2011, Texas Instruments Incorporated
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