TM4C123AH6PM Datasheet, PDF (495/1226 Pages) Texas Instruments – This data sheet provides reference information for the TM4C123AH6PM microcontroller, describing

Tiva^™ TM4C123AH6PM Microcontroller _{(identical to LM4F211H5QR)}
Bit/Field
10
9
8:3
2
1
Name
INVDMISC
VOLTMISC
reserved
EMISC
PMISC
Type
R/W1C
Reset
0
Description
Invalid Data Masked Interrupt Status and Clear
Value Description
0 When read, a 0 indicates that an interrupt has not occurred.
A write of 0 has no effect on the state of this bit.
1 When read, a 1 indicates that an unmasked interrupt was
signaled.
Writing a 1 to this bit clears INVDMISC and also the INVDRIS
bit in the FCRIS register (see page 489).
R/W1C
0
VOLT Masked Interrupt Status and Clear
Value Description
0 When read, a 0 indicates that an interrupt has not occurred.
A write of 0 has no effect on the state of this bit.
1 When read, a 1 indicates that an unmasked interrupt was
signaled.
Writing a 1 to this bit clears VOLTMISC and also the VOLTRIS
bit in the FCRIS register (see page 489).
RO
R/W1C
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
EEPROM Masked Interrupt Status and Clear
Value Description
0 When read, a 0 indicates that an interrupt has not occurred.
A write of 0 has no effect on the state of this bit.
1 When read, a 1 indicates that an unmasked interrupt was
signaled.
Writing a 1 to this bit clears EMISC and also the ERIS bit in the
FCRIS register (see page 489).
R/W1C
0
Programming Masked Interrupt Status and Clear
Value Description
0 When read, a 0 indicates that a programming cycle complete
interrupt has not occurred.
A write of 0 has no effect on the state of this bit.
1 When read, a 1 indicates that an unmasked interrupt was
signaled because a programming cycle completed.
Writing a 1 to this bit clears PMISC and also the PRIS bit in the
FCRIS register (see page 489).
July 17, 2013
495
Texas Instruments-Production Data