TM4C123AH6PM Datasheet, PDF (139/1226 Pages) Texas Instruments – This data sheet provides reference information for the TM4C123AH6PM microcontroller, describing

Tiva^™ TM4C123AH6PM Microcontroller _{(identical to LM4F211H5QR)}
Register 23: Interrupt 128-138 Clear Pending (UNPEND4), offset 0x290
Note: This register can only be accessed from privileged mode.
The UNPEND4 register shows which interrupts are pending and removes the pending state from
interrupts. Bit 0 corresponds to Interrupt 128; bit 10 corresponds to Interrupt 138. See Table
2-9 on page 94 for interrupt assignments.
Interrupt 128-138 Clear Pending (UNPEND4)
Base 0xE000.E000
Offset 0x290
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
Type RO
Reset
0
14
13
12
reserved
RO
RO
RO
0
0
0
11
10
9
8
7
6
5
4
3
2
1
0
INT
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:11
10:0
Name
reserved
INT
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W
0x0
Interrupt Clear Pending
Value Description
0 On a read, indicates that the interrupt is not pending.
On a write, no effect.
1 On a read, indicates that the interrupt is pending.
On a write, clears the corresponding INT[n] bit in the PEND4
register, so that interrupt [n] is no longer pending.
Setting a bit does not affect the active state of the corresponding
interrupt.
July 17, 2013
139
Texas Instruments-Production Data