TMS470MF03107 Datasheet, PDF (47/67 Pages) Texas Instruments – TMS470MF04207/TMS470MF03107 16/32-Bit RISC Flash Microcontroller

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5.2.7 JTAG Timing
TMS470MF04207
TMS470MF03107
SPNS159C – JANUARY 2012
Table 5-12. JTAG Scan Interface Timing (JTAG Clock specification 10-MHz and 50-pF Load on TDO
Output)
(see Figure 5-8
NO.
MIN
MAX
UNIT
1 t_c(JTAG)
2 t_{su(TDI/TMS - TCKr)}
3 t_{h(TCKr -TDI/TMS)}
4 t_{h(TCKf -TDO)}
5 t_{d(TCKf -TDO)}
Cycle time, JTAG low and high period
Setup time, TDI, TMS before TCK rise (TCKr)
Hold time, TDI, TMS after TCKr
Hold time, TDO after TCKf
Delay time, TDO valid after TCK fall (TCKf)
50
ns
5
ns
5
ns
5
ns
45
ns
TCK
1
1
TMS
TDI
2
3
TDO
4
5
Figure 5-8. JTAG Scan Timings
Copyright © 2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
47
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