AFE8221-Q1 Datasheet, PDF (44/59 Pages) Texas Instruments – DUAL INTERMEDIATE FREQUENCY (IF) ANALOG FRONT-END FOR DIGITAL RADIO

AFE8221-Q1
SBAS434 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
Bits
15:0
Bits
4:0
5
6
8:7
Bits
11:0
Bits
11:0
Bits
7:0
11:8
14:12
15
Bits
15:0
Bits
15:0
Table 27. Control Registers (continued)
Address: 35
Description: Data Interface Configuration (continued)
Range
Action
0..65535
Configuration for BB_DOUT3
Address: 36
Description: Data Interface Configuration
Range
Action
0..16
Divide factor to derive BB_BCK from MCLK
0: BB_WS and BB_DOUTx change on rising edge of BB_BCK
0/1
1: BB_WS and BB_DOUTx change on falling edge of BB_BCK
0: BB_WS generated by DDC0
0/1
1: BB_WS generated by DDC1
0: BB_WS one BB_BCK cycle wide
0..2
1: BB_WS toggles once per frame
2: BB_WS 16 BB_BCK cycles wide
Address: 37
Description: CDAC0 Output
Range
Action
0..4095
Output value for CDAC0
Address: 38
Description: CDAC1 Output
Range
Action
0..4095
Output value for CDAC1
Address: 39
Description: Aux ADC
Range
Action
0..255
Register read: Conversion result for auxiliary ADC (read only)
0: No aux ADC inputs connected
1: AUX_ADC0 pin connected to aux ADC
0, 1, 2, 4, or 8
2: AUX_ADC1 pin connected to aux ADC
4: AUX_ADC2 pin connected to aux ADC
8: AUX_ADC3 pin connected to aux ADC
Not used
Register write: Starts a conversion when 1 is written
0/1
Register read: Returns 0 while conversion is in progress, 1 when
conversion is finished
Address: 40
Description: Reference Clock Configuration
Range
Action
0..4095
Low period ( in units of MCLK cycles) for reference clock output
Address: 41
Description: Reference Clock Configuration
Range
Action
0..4095
High period (in units of MCLK cycles) for reference clock output
Parameter Name
bb_dout3_config
Parameter Name
bb_bck_div(4:0)
bb_bck_edge
bb_ws_select
bb_ws_mode(1:0)
Parameter Name
cdac0_out(11:0)
Parameter Name
cdac1_out(11:0)
Parameter Name
aux_adc_out(7:0)
aux_adc_sel(3:0)
aux_adc_done
Parameter Name
refclk_lo(15:0)
Parameter Name
refclk_hi(15:0)
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