LM3S102 Datasheet, PDF (435/487 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S102 Microcontroller
Table 15-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
GND
I2CSCL
I2CSDA
8
-
Power Ground reference for logic and I/O pins.
18
21
23
I/O
OD
I²C clock.
24
I/O
OD
I²C data.
LDO
6
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater.
OSC0
9
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
10
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
PA0
11
I/O
TTL
GPIO port A bit 0.
PA1
12
I/O
TTL
GPIO port A bit 1.
PA2
13
I/O
TTL
GPIO port A bit 2.
PA3
14
I/O
TTL
GPIO port A bit 3.
PA4
15
I/O
TTL
GPIO port A bit 4.
PA5
16
I/O
TTL
GPIO port A bit 5.
PB0
19
I/O
TTL
GPIO port B bit 0.
PB1
20
I/O
TTL
GPIO port B bit 1.
PB2
23
I/O
TTL
GPIO port B bit 2.
PB3
24
I/O
TTL
GPIO port B bit 3.
PB4
4
I/O
TTL
GPIO port B bit 4.
PB5
3
I/O
TTL
GPIO port B bit 5.
PB6
2
I/O
TTL
GPIO port B bit 6.
PB7
1
I/O
TTL
GPIO port B bit 7.
PC0
28
I/O
TTL
GPIO port C bit 0.
PC1
27
I/O
TTL
GPIO port C bit 1.
PC2
26
I/O
TTL
GPIO port C bit 2.
PC3
25
I/O
TTL
GPIO port C bit 3.
RST
5
I
TTL
System reset input.
SSIClk
13
I/O
TTL
SSI clock.
SSIFss
14
I/O
TTL
SSI frame.
SSIRx
15
I
TTL
SSI receive.
SSITx
16
O
TTL
SSI transmit.
SWCLK
28
I
TTL
JTAG/SWD CLK.
SWDIO
27
I/O
TTL
JTAG TMS and SWDIO.
SWO
25
O
TTL
JTAG TDO and SWO.
TCK
28
I
TTL
JTAG/SWD CLK.
TDI
26
I
TTL
JTAG TDI.
TDO
25
O
TTL
JTAG TDO and SWO.
TMS
27
I/O
TTL
JTAG TMS and SWDIO.
TRST
1
I
TTL
JTAG TRST.
July 14, 2014
435
Texas Instruments-Production Data