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MSP430F543XA_12 Datasheet, PDF (43/104 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F543xA, MSP430F541xA
www.ti.com
SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010
Schmitt-Trigger Inputs – General Purpose I/O(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN TYP
VIT+ Positive-going input threshold voltage
1.8 V
0.80
3V
1.50
VIT– Negative-going input threshold voltage
1.8 V
0.45
3V
0.75
Vhys Input voltage hysteresis (VIT+ – VIT–)
1.8 V
0.3
3V
0.4
RPull
CI
Pullup/pulldown resistor(2)
Input capacitance
For pullup: VIN = VSS
For pulldown: VIN = VCC
VIN = VSS or VCC
20
35
5
(1) Same parametrics apply to clock input pin when crystal bypass mode is used on XT1 (XIN) or XT2 (XT2IN).
(2) Also applies to RST pin when pullup/pulldown resistor is enabled.
MAX
1.40
2.10
1.00
1.65
0.85
1.0
UNIT
V
V
V
50 kΩ
pF
Inputs – Ports P1 and P2(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
t(int)
External interrupt timing(2)
Port P1, P2: P1.x to P2.x, External trigger pulse width to
set interrupt flag
2.2 V/3 V
20
MAX UNIT
ns
(1) Some devices may contain additional ports with interrupts. See the block diagram and terminal function descriptions.
(2) An external signal sets the interrupt flag every time the minimum interrupt pulse width t(int) is met. It may be set by trigger signals shorter
than t(int).
Leakage Current – General Purpose I/O
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Ilkg(Px.x)
PARAMETER
High-impedance leakage current
TEST CONDITIONS
(1) (2)
VCC
MIN
1.8 V/3 V
MAX UNIT
±50 nA
(1) The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.
(2) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is
disabled.
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