TM4C1231H6PZ Datasheet, PDF (411/1174 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1231H6PZ Microcontroller
Register 111: Device Capabilities 4 (DC4), offset 0x01C
This register is predefined by the part and can be used to verify features. If any bit is clear in this
register, the module is not present. The corresponding bit in the RCGC2, SCGC2, DCGC2, and the
peripheral-specific RCGC, SCGC, and DCGC registers registers cannot be set.
Important: This register is provided for legacy software support only.
The Peripheral Present registers should be used to determine which modules are
implemented on this microcontroller. A read of DC4 correctly identifies if a legacy module
is present but software must use the Peripheral Present registers to determine if a
module is present that is not supported by the DCn registers.
The peripheral-resident Peripheral Properties registers should be used to determine
which pins and features are available on this microcontroller. A read of DC4 correctly
identifies if a legacy pin or feature is present. Software must use the Peripheral Properties
registers to determine if a pin or feature is present that is not supported by the DCn
registers.
Device Capabilities 4 (DC4)
Base 0x400F.E000
Offset 0x01C
Type RO, reset 0x0004.F1FF
31
30
29
28
reserved EPHY0 reserved EMAC0
Type RO
RO
RO
RO
Reset
0
0
0
0
15
CCP7
Type RO
Reset
1
14
CCP6
RO
1
13
UDMA
RO
1
12
ROM
RO
1
27
26
25
reserved
RO
RO
RO
0
0
0
11
10
9
reserved
RO
RO
RO
0
0
0
24
23
E1588
RO
RO
0
0
22
21
20
reserved
RO
RO
RO
0
0
0
19
18
17
16
PICAL
reserved
RO
RO
RO
RO
0
1
0
0
8
GPIOJ
RO
1
7
GPIOH
RO
1
6
GPIOG
RO
1
5
GPIOF
RO
1
4
GPIOE
RO
1
3
GPIOD
RO
1
2
GPIOC
RO
1
1
GPIOB
RO
1
0
GPIOA
RO
1
Bit/Field
31
30
29
28
27:25
24
Name
reserved
EPHY0
reserved
EMAC0
reserved
E1588
Type
RO
RO
RO
RO
RO
RO
Reset
0
0x0
0
0x0
0
0x0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Ethernet PHY Layer 0 Present
When set, indicates that Ethernet PHY layer 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Ethernet MAC Layer 0 Present
When set, indicates that Ethernet MAC layer 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
1588 Capable
When set, indicates that Ethernet MAC layer 0 is 1588 capable.
June 12, 2014
411
Texas Instruments-Production Data