TLC5957 Datasheet, PDF (4/25 Pages) Texas Instruments – TLC5957 48-Channel, 16-Bit ES-PWM LED Driver with Pre-Charge FET, LED OPEN Detection and Caterpillar Cancelling

TLC5957
SLVSCQ4 – OCTOBER 2014
NAME
SCLK
PIN
NO.
28
SIN
26
SOUT
42
VCC
43
Pin Functions (continued)
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I/O
DESCRIPTION
I Serial data shift clock. Data present on SIN are shifted to the 48-bit common shift register LSB
with the SCLK rising edge. Data in the shift register are shifted towards the MSB at each SCLK
rising edge.
The common shift register MSB appears on SOUT.
I Serial data input of the 48-bit common shift register.
When SIN is high level, the LSB is set to '1' for only one SCLK input rising edge. If two SCLK
rising edges are input while SIN is high, then the 48-bit shift register LSB and LSB+1 are set to '1'.
When SIN is low, the LSB is set to '0' at the SCLK input rising edge.
O Serial data output of the 48-bit common shift register. SOUT is connected to the MSB of the
register.
— Power-supply voltage.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
V_CC ⁽²⁾
I_OUT
V_IN ⁽²⁾
V_OUT ⁽²⁾
T_J(MAX)
Supply voltage
VCC
Output current (dc)
OUTx0 to OUTx15, x = R, G, B
Input voltage range
SIN, SCLK, LAT, GCLK, IREF
Output voltage range
SOUT
OUTx0 to OUTx15, x = R, G, B
Operation junction temperature
MIN
MAX
UNIT
–0.3
6.0
V
30
30
mA
–0.3
V_CC + 0.3
V
–0.3
V_CC + 0.3
V
–0.3
11
V
–40
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to device ground terminal.
7.2 Handling Ratings
MIN
MAX
T_stg
Storage temperature range
–55
150
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾
–3
3
V_(ESD)
Electrostatic discharge
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins ⁽²⁾
–1
1
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
°C
kV
4
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