TLC5957 Datasheet, PDF(17/25 Page) Texas Instruments – TLC5957 48-Channel, 16-Bit ES-PWM LED Driver with Pre-Charge FET, LED OPEN Detection and Caterpillar Cancelling

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TLC5957 Datasheet, PDF (17/25 Pages) Texas Instruments – TLC5957 48-Channel, 16-Bit ES-PWM LED Driver with Pre-Charge FET, LED OPEN Detection and Caterpillar Cancelling

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10 Application and Implementation

TLC5957

SLVSCQ4 â OCTOBER 2014

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TIâs customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

10.1 Application Information

Send request via email for Application Note: Build High Density, High Refresh Rate, Multiplexing LED Panel with

TLC5957

11 Power Supply Recommendations

The VCC power supply voltage should be decoupled by placing a 0.1 ÂµF ceramic capacitor close to VCC pin and

GND plane. Depending on panel size, several electrolytic capacitors must be placed on board equally distributed

to get a well regulated LED supply voltage (VLED). VLED voltage ripple should be less than 5% of its nominal

value. Furthermore, the VLED should be set to the voltage calculated by equation:

VLED > Vf + 0.4V (10mA constant current example)

(3)

Where: Vf = maximum forward voltage of LED

12 Layout

12.1 Layout Guidelines

1. Place the decoupling capacitor near the VCC pin and GND plane.

2. Place the current programming resistor Riref close to IREF pin and IREFGND pin.

3. Route the GND pattern as widely as possible for large GND currents. Maximum GND current is

approximately 1.2A

4. Routing between the LED cathode side and the device OUTXn pin should be as short and straight as

possible to reduce wire inductance.

5. The PowerPADâ¢ must be connected to GND plane because the pad is used as power ground pin internally,

there will be large current flow through this pad when all channels turn on. Furthermore, this pad should be

connected to a heat sink layer by thermal via to reduce device temperature. One suggested thermal via

pattern is shown as below. For more information about suggested thermal via pattern and via size, see "

PowerPAD Thermally Enhanced Package", SLMA002G.

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