TLC59210 Datasheet, PDF (4/22 Pages) Texas Instruments – 8-BIT DMOS SINK DRIVER WITH LATCH

TLC59210
SCLS711A – MARCH 2009 – REVISED NOVEMBER 2015
6 Specifications
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6.1 Absolute Maximum Ratings
(1)_{over operating free-air temperature range (unless otherwise noted)}
V_CC
Supply voltage
D
Input voltage
V_ds
Output voltage
H output
I_ds
Output current
1 bit for output low,
V_CC = 3 V to 3.6 V
V_CC = 4.5 V to 5.5 V
I_IK
Input clamp current
V_I < 0 V
Operating free-air temperature
T_stg
Storage temperature
MIN
MAX UNIT
–0.5
7V
–0.5
7V
–0.5
32 V
100
mA
200
–20 mA
–40
85 °C
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-
C101 ⁽²⁾
Machine Model (A115-A), per ANSI/ESDA/JEDEC Standard JESD-17⁽³⁾
VALUE
±2000
±1000
±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
V_CC
Supply voltage
V_IH
High-level input voltage
V_IL
Low-level input voltage
V_ds
Output voltage
I_ds
Output current
T_A
Operating free-air temperature
N package,
V_CC = 4.5 V to 5.5 V
PW package,
V_CC = 4.5 V to 5.5 V
Duty cycle < 42%
Duty cycle < 100%
Duty cycle < 24%
Duty cycle < 100%
MIN
3
V_CC × 0.7
0
–40
MAX
5.5
V_CC
V_CC × 0.3
30
200
130
200
95
85
UNIT
V
V
V
V
mA
°C
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
TLC59210
N (PDIP)
PW (TSSOP)
UNIT
20 PINS
20 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
53.6
94.3
°C/W
41.2
28.3
°C/W
34.6
45.7
°C/W
22.3
1.6
°C/W
34.4
45.1
°C/W
N/A
N/A
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
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