SM74104 Datasheet, PDF (4/16 Pages) Texas Instruments – SM74104 High Voltage Half-Bridge Gate Driver with Adaptive Delay

Ordering Information
Ordering Number
SM74104SD
SM74104SDE
SM74104SDX
SM74104MA
SM74104MAE
SM74104 MAX
Package Type Package Marking
LLP-10
S74104
SOIC-8
S74104
NSC Package
Drawing
SDC10A
M08A
Supplied As
1000 Units in Tape and Reel
250 Units in Tape & Reel
4500 Units in Tape & Reel
95 Units in Rail
250 Units in Tape & Reel
2500 Units in Tape & Reel
Pin Descriptions
Pin
SOIC-8 LLP-10
1
1
2
2
3
3
4
4
5
7
6
8
7
9
8
10
Name
Description
Application Information
V_DD Positive gate drive supply Locally decouple to V_SS using low ESR/ESL capacitor, located as close to
IC as possible.
HB High side gate driver
bootstrap rail
Connect the positive terminal of bootstrap capacitor to the HB pin and
connect negative terminal to HS. The Bootstrap capacitor should be placed
as close to IC as possible.
HO High side gate driver output Connect to gate of high side MOSFET with short low inductance path.
HS High side MOSFET source Connect to bootstrap capacitor negative terminal and source of high side
connection
MOSFET.
RT Deadtime programming pin Resistor from RT to ground programs the deadtime between high and low
side transitions.The resistor should be located close to the IC to minimize
noise coupling from adjacent traces.
IN Control input
Logic 1 equals High Side ON and Low Side OFF. Logic 0 equals High Side
OFF and Low Side ON.
V_SS Ground return
All signals are referenced to this ground.
LO Low side gate driver output Connect to the gate of the low side MOSFET with a short low inductance
path.
Note: For LLP-10 package, it is recommended that the exposed pad on the bottom of the SM74104 be soldered to ground plane on the PC board, and
the ground plane should extend out from beneath the IC to help dissipate the heat. Pins 5 and 6 have no connection.
3
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