OPA2604 Datasheet, PDF (4/26 Pages) Burr-Brown (TI) – Dual FET-Input, Low Distortion OPERATIONAL AMPLIFIER

OPA2604
SBOS006A – SEPTEMBER 2000 – REVISED DECEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
Power supply voltage
Input voltage
Output short-circuit to ground
Operating temperature
Junction temperature
Lead temperature (soldering, 10 s) AP
Lead temperature (soldering, 3 s) AU
T_stg
Storage temperature
MIN
MAX
±25
(V–)–1
(V+)+1
Continuous
–40
100
150
300
260
–40
125
UNIT
V
V
°C
°C
°C
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
OPA2604 in SOIC Package
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-
C101 ⁽²⁾
±2000
±750
OPA2604 in PDIP Package
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
±2000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V+, V–
Power supply voltage
Operating temperature
MIN
NOM
MAX UNIT
±4.5
±15
±24
V
–40
100
°C
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
OPA2604
D (SOIC)
P (PDIP)
UNIT
8 PINS
8 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
107.9
57.3
49.7
11.7
48.9
N/A
46.7
°C/W
35
°C/W
24
°C/W
12.1
°C/W
23.8
°C/W
N/A
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
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