OPA2325 Datasheet, PDF (4/32 Pages) Texas Instruments – Precision, 10-MHz, Low-Noise, Low-Power, RRIO, CMOS Operational Amplifier

OPA2325
SBOS637 – OCTOBER 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
Supply voltage
Signal input pins
Output short-circuit⁽³⁾
Temperature
V_S = (V+) – (V–)
Voltage ⁽²⁾
Current ⁽²⁾
Specified, T_A
Junction, T_J
Storage, T_stg
MIN
MAX
6
(V–) – 0.5
(V+) + 0.5
–10
10
Continuous
–40
125
150
–65
150
UNIT
V
V
mA
mA
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾
VALUE
±4000
±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_S
Supply voltage
Single supply
Dual supply
Specified temperature range
MIN
NOM
MAX
UNIT
2.2
5.5
V
±1.1
±2.75
–40
125
°C
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
OPA2325
D (SOIC)
UNIT
8 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
119.1
59.5
61.1
15.0
60.4
N/A
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
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