OPA2325 Datasheet, PDF (24/32 Pages) Texas Instruments – Precision, 10-MHz, Low-Noise, Low-Power, RRIO, CMOS Operational Amplifier

OPA2325
SBOS637 – OCTOBER 2016
10.2 Layout Example
VIN A
RG
+
RF
VIN B
VOUT A
RG
+
RF
VOUT B
Place components
close to device and to
each other to reduce
parasitic errors.
Figure 56. Schematic Representation for Figure 57
OUT A
VS+
RF
GND
RG
VIN A
OUT A
-IN A
+IN A
V±
V+
OUT B
RF
-IN B
RG
+IN B
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Use low-ESR,
ceramic bypass
capacitor. Place as
close to the device
as possible.
GND
OUT B
GND
VIN B
Use low-ESR,
ceramic bypass
capacitor. Place as
close to the device
as possible.
GND
VS±
Ground (GND) plane on another layer
Figure 57. Layout Example
Keep input traces short
and run the input traces
as far away from
the supply lines
as possible.
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