LP2953QML_16 Datasheet, PDF (4/26 Pages) Texas Instruments – Adjustable Micropower Low-Dropout Voltage Regulators

LP2953QML, LP2953QML-SP
SNVS395C – NOVEMBER 2010 – REVISED APRIL 2013
www.ti.com
Absolute Maximum Ratings⁽¹⁾
Storage Temperature Range
Operating Temperature Range
Maximum Junction Temperature
Lead Temp. (Soldering, 5 seconds)
Power Dissipation⁽²⁾
Input Supply Voltage
Feedback Input Voltage⁽³⁾
Comparator Input Voltage⁽⁴⁾
Shutdown Input Voltage⁽⁴⁾
Comparator Output Voltage⁽⁴⁾
16LD CFP "WG" (device 01) (Still Air)
Thermal Resistance
16LD CFP "WG" (device 01) (500LF/Min Air flow)
θ_JA
16LD CFP "GW" (device 02) (Still Air)
16LD CFP "GW" (device 02) (500LF/Min Air flow)
16LD CFP "WG" (device 01)⁽⁵⁾
θ_JC
16LD CFP "GW" (device 02)
Package Weight (Typical)
ESD Rating⁽⁶⁾
16LD CFP "WG" (device 01)
16LD CFP "GW" (device 02)
−65°C ≤ T_A ≤ +150°C
−55°C ≤ T_A ≤ +125°C
+150°C
260°C
Internally Limited
−20V to +30V
−0.3V to +5V
−0.3V to +30V
−0.3V to +30V
−0.3V to +30V
134°C/W
81°C/W
140°C/W
90°C/W
7°C/W
15°C/W
360mg
410mg
2 KV
(1) Abs. Max Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the
device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical
Characteristics. The specifications apply only for the test conditions listed. Some performance characteristics may degrade when the
device is not operated under the listed test conditions.
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by T_Jmax (maximum junction temperature),
θ_JA (package junction to ambient thermal resistance), and T_A (ambient temperature). The maximum allowable power dissipation at any
temperature is P_Dmax = (T_Jmax - T_A)/θ_JA or the number given in the Absolute Maximum Ratings, whichever is lower.
(3) When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped
to ground.
(4) May exceed the input supply voltage.
(5) The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full
advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either
metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be
calculated using θ_JA, rather than θ_JC, thermal resistance. It must not be assumed that the device leads will provide substantial heat
transfer out the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package
base. The stated θ_JC thermal resistance is for the package material only, and does not account for the additional thermal resistance
between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and
must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
(6) Human body model, 1.5 KΩ in series with 100 pF.
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