DS91M124 Datasheet, PDF (4/14 Pages) Texas Instruments – DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input

Absolute Maximum Ratings (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Supply Voltage
−0.3V to +4V
LVCMOS Input Voltage
M-LVDS Output Voltage
−0.3V to (V_DD + 0.3V)
−1.9V to +5.5V
M-LVDS Output Short Circuit
Current Duration
Continuous
Junction Temperature
+140°C
Storage Temperature Range
−65°C to +150°C
Lead Temperature Range
Soldering (4 sec.)
+260°C
Maximum Package Power Dissipation @ +25°C
MA Package
2.21W
Derate MA Package
19.2 mW/°C above +25°C
Package Thermal Resistance (4-Layer, 2 oz. Cu, JEDEC)
 θ_JA
 θ_JC
+52°C/W
+19°C/W
ESD Susceptibility
HBM (Note 1)
MM (Note 2)
CDM (Note 3)
≥8 kV
≥250V
≥1250V
Note 1: Human Body Model, applicable std. JESD22-A114C
Note 2: Machine Model, applicable std. JESD22-A115-A
Note 3: Field Induced Charge Device Model, applicable std.
JESD22-C101-C
Recommended Operating
Conditions
Min Typ Max Units
Supply Voltage, V_DD
Voltage at Any Bus Terminal
3.0 3.3 3.6 V
−1.4
+3.8 V
 (Separate or Common-Mode)
LVTTL Input Voltage High V_IH 2.0
LVTTL Input Voltage Low V_IL
0
Operating Free Air
V_DD V
0.8 V
Temperature T_A
−40 +25 +85 °C
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 5, Note 6, Note 7, Note 10)
Symbol
Parameter
Conditions
Min Typ Max
LVCMOS DC Specifications
V_IH
High-Level Input Voltage
V_IL
Low-Level Input Voltage
I_IH
High-Level Input Current
I_IL
Low-Level Input Current
V_CL
Input Clamp Voltage
M-LVDS DC Specifications
V_IH = 3.6V
V_IL = 0V
I_IN = -18 mA
2.0
V_DD
GND
0.8
-15
±1
15
-15
±1
15
-1.5
|V_AB|
ΔV_AB
Differential Output Voltage Magnitude
Change in Differential Output Voltage Magnitude
R_L = 50Ω, C_L = 5 pF
Figures 1, 3
480
−50
650
50
Between Logic States
V_OS(SS)
|ΔV_OS(SS)|
Steady-State Common-Mode Output Voltage
Change in Steady-State Common-Mode Output
Voltage Between Logic States
Figures 1, 2
R_L = 50Ω
0.30 1.6 2.10
0
50
V_A(OC)
V_B(OC)
V_P(H)
V_P(L)
Maximum Steady-State Open-Circuit Output Voltage
Maximum Steady-State Open-Circuit Output Voltage
Voltage Overshoot, Low-to-High Level Output
(Note 8)
Voltage Overshoot, High-to-Low Level Output
(Note 8)
Figure 4
R_L = 50Ω, C_L = 5 pF
C_D = 0.5 pF
Figures 6, 7
0
0
−0.2V_SS
2.4
2.4
1.2V_SS
I_OS
Output Short-Circuit Current (Note 9)
Figure 5
-43
43
V_A = 3.8V, V_B = 1.2V
0
32
I_A
Driver High-Impedance Output Current
V_A = 0V or 2.4V, V_B = 1.2V −20
20
V_A = −1.4V, V_B = 1.2V
−32
0
V_A = 3.8V, V_B = 1.2V
0
32
I_B
Driver High-Impedance Output Current
V_A = 0V or 2.4V, V_B = 1.2V −20
20
V_A = −1.4V, V_B = 1.2V
−32
0
I_AB
Driver High-Impedance Output Differential Curent
(I_A − I_B)
V_A = V_B, −1.4V ≤ V ≤ 3.8V
−4
4
Units
V
V
μA
μA
V
mV
mV
V
mV
V
V
V
V
mA
μA
μA
μA
μA
μA
μA
μA
3
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