DS90LT012AQ_15 Datasheet, PDF (4/14 Pages) Texas Instruments – Automotive LVDS Differential Line Receiver

DS90LT012AQ
SNLS297E – MAY 2008 – REVISED APRIL 2013
Parameter Measurement Information (continued)
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Figure 4. Receiver Propagation Delay and Transition Time Waveforms
Typical Applications
Figure 5. Balanced System — Point-to-Point Application
(DS90LT012AQ)
APPLICATION INFORMATION
General application guidelines and hints for LVDS drivers and receivers may be found in the following application
notes: LVDS Owner's Manual (lit #550062-003), AN-808 (SNLA028), AN-977 (SNLA166), AN-971 (SNLA165),
AN-916 (SNLA219), AN-805 (SNOA233), AN-903 (SNLA034).
LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as
is shown in Figure 5. This configuration provides a clean signaling environment for the fast edge rates of the
drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted pair
cable, a parallel pair cable, or simply PCB traces. Typically the characteristic impedance of the media is in the
range of 100Ω. The internal termination resistor converts the driver output (current mode) into a voltage that is
detected by the receiver. Other configurations are possible such as a multi-receiver configuration, but the effects
of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise
margin limits, and total termination loading must be taken into account.
The DS90LT012AQ differential line receiver is capable of detecting signals as low as 100 mV, over a ±1V
common-mode range centered around +1.2V. This is related to the driver offset voltage which is typically +1.2V.
The driven signal is centered around this voltage and may shift ±1V around this center point. The ±1V shifting
may be the result of a ground potential difference between the driver's ground reference and the receiver's
ground reference, the common-mode effects of coupled noise, or a combination of the two. The AC parameters
of both receiver input pins are optimized for a recommended operating input voltage range of 0V to +2.4V
(measured from each pin to ground). The device will operate for receiver input voltages up to V_DD, but exceeding
V_DD will turn on the ESD protection circuitry which will clamp the bus voltages.
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