CD4021B-Q1 Datasheet, PDF (4/14 Pages) Texas Instruments – CMOS 8-STAGE STATIC SHIFT REGISTER

CD4021B-Q1
SCHS378 – MARCH 2010
www.ti.com
RECOMMENDED OPERATING CONDITIONS
At T_A = 25°C, unless other wise specified. For maximum reliability, nominal operating conditions should be selected so that
operation is always within the following ranges.
Supply voltage range
(T_A = full package-temperature range)
V_DD
MIN
MAX UNIT
3
18
V
5
180
t_W
Clock pulse width
10
80
ns
15
50
5
3
f_CL
Clock frequency
10
6 MHz
15
8.5
t_rCL,
t_fCL
Clock rise and fall time
5
15
10
15
µs
15
15
5
120
Serial input (referred to CL)
10
80
ns
15
60
t_s
Set-up time
Parallel inputs
CD4014B (referred to CL)
Parallel inputs
CD4021B (referred to P/S)
5
80
10
50
ns
15
40
5
50
10
30
ns
15
20
Parallel/Serial Control
CD4014B (referred to CL)
5
180
10
80
ns
15
60
5
160
t_W
Parallel/serial pulse width
10
80
ns
15
50
5
280
t_REM
Parallel/serial removal time
10
140
ns
15
100
4
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