BQ2014H_15 Datasheet, PDF (4/28 Pages) Texas Instruments – Low-Cost NiCd/NiMH Gas Gauge IC

bq2014H
Voltage Thresholds
In conjunction with monitoring V_SR for charge/discharge
currents, the bq2014H monitors the battery potential
through the SB pin for the end-of-discharge voltage (EDV)
thresholds.
The EDV threshold levels are used to determine when
the battery has reached an “empty” state.
The EDV thresholds for the bq2014H are programmable
with the default values fixed as follows:
EDV1 (first) = 0.76V
EDVF (final) = EDV1 - 0.025V = 0.735V
The battery voltage divider (RB1 and RB2 in Figure 1) is
used to scale these values to the desired threshold.
If V_SB is below either of the two EDV thresholds, the as-
sociated flag is latched and remains latched, independ-
ent of VSB, until the next valid charge.
EDV monitoring is disabled if the discharge rate is
greater
than
2C
(OVLD
Flag
=
1)
and
resumes
1
2
second
after the rate falls below 2C. The V_SB value is available
over the serial port.
RBI Input
The RBI input pin is used with a storage capacitor or ex-
ternal supply to provide backup potential to the internal
bq2014H registers when V_CC drops below 3.0V. V_CC is
output on RBI when V_CC is above 3.0V. If using an exter-
nal supply (such as the bottom series cell) as the backup
source, an external diode is required for isolation.
TMP (hex)
0x
1x
2x
3x
4x
5x
6x
7x
8x
9x
Ax
Bx
Cx
Temperature Range
< -30°C
-30°C to -20°C
-20°C to -10°C
-10°C to 0°C
0°C to 10°C
10°C to 20°C
20°C to 30°C
30°C to 40°C
40°C to 50°C
50°C to 60°C
60°C to 70°C
70°C to 80°C
> 80°C
Layout Considerations
Reset
The bq2014H can be reset by removing V_CC and ground-
ing the RBI pin for 15 seconds or by commands over the
serial port. The serial port reset command sequence re-
quires writing 00h to register PPFC (address = 1Eh) and
then writing 00h to register LMD (address = 05h).
Temperature
The bq2014H internally determines the temperature in
10°C steps centered from approximately -35°C to +85°C.
The temperature steps are used to adapt charge and dis-
charge rate compensations, self-discharge counting, and
available charge display translation.
The temperature range is available over the serial port
in 10°C increments, as shown in the following table
The bq2014H measures the voltage differential between
the SR and V_SS pins. V_OS (the offset voltage at the SR
pin) is greatly affected by PC board layout. For optimal
results, the PC board layout should follow the strict rule
of a single-point ground return. Sharing high-current
ground with small-signal ground causes undesirable
noise on the small-signal nodes. Additionally:
I The capacitors (C1 and C2) should be placed as
close as possible to the V_CC and SB pins,
respectively, and their paths to V_SS should be as
short as possible. A high-quality ceramic capacitor
of 0.1µF is recommended for V_CC.
I The sense-resistor capacitor should be placed as close
as possible to the SR pin.
I The sense resistor (R_S) should be as close as possible to
the bq2014H.
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