SN75C091A Datasheet, PDF (39/106 Pages) Texas Instruments – SCSI Bus Controller

4.6.1.6 Data Transfer
The command state code is updated to 5 when the target asserts REQ to begin the data phase. Data
transfers proceed as in the Transfer Info command; however, they may be interlaced with certain
message-in phases used to save data pointers and to perform disconnect/reconnect cycles. If the proper
flow is followed, any number of save-data-pointer messages or disconnect/reconnect cycles may occur
without processor intervention. When the transfer counter decrements to zero, the data transfer is complete
and the command state code is set to hexadecimal B.
HPE and AAPE control register bits affect data transfer as follows:
HPE (halt on parity error): This bit causes the data transfer to halt on a parity error as defined for the transfer
command. The command is terminated with halted- and parity-error interrupts. A transfer pad command can
be used to complete the data phase. Note that if a parity error occurs with the HPE bit set to 0, the Select
with ATN and Transfer command is terminated when the data transfer is complete or when the target
changes phase. A parity error and a halted interrupt are generated. This prevents the data pointer from being
saved after a parity error has occurred.
AAPE (assert ATN on parity error): ATN is asserted if a parity error is detected as defined for the transfer
command. For the Select with ATN and Transfer command, AAPE only affects data transfers because the
command is terminated prior to acknowledging a message-in or status byte if a parity error condition is
observed.
4.6.1.7 Disconnect/Reselection
A target disconnect causes the command state code to be set to 8. If the HD bit in the control register is set
to 1, the command terminates with a disconnected interrupt and the command state code is set to 8. If the
HD bit is set to 0 , the SBC waits indefinitely for a reconnect by the same target. If a different target
reconnects, a reselected interrupt is generated. If the SBC is selected, a selected interrupt is generated. In
either case, the command state code retains the value 8. Note that occurrence of a disconnect at any time
other than following a disconnect message or command-complete message is a SCSI catastrophic error
condition. In this case, the control error interrupt is generated; a master reset and/or SCSI reset is required
for recovery.
4.6.1.8 Message-In Transfers
Only the single-byte messages shown below are handled by the Select with ATN and Transfer command.
Each message is decoded and evaluated prior to acknowledgement. This allows the SBC to acknowledge
only error-free messages appropriate for the command flow. An acceptable message is acknowledged and
the appropriate action is taken. If the message is not acceptable, a bus service interrupt is generated and
the processor must receive the message using the Transfer Info command. For example, a message with
a parity error is not received via the Select with ATN and Transfer command and no parity error interrupt
is generated until the message is received using the Transfer Info command.
Save Data Pointer Message (hexadecimal 02): A Save Data Pointer message is acknowledged but
not stored into the receive FIFO. Its receipt causes loading of the current transfer counter value into
the backup counter register. The command state code is updated to 6 and the SDP bit is set to 1. If a
data error occurs, the processor uses the SDP bit to determine if the backup counter needs to be read
in order to redo a data transfer using the most recently saved data pointer.
Disconnect Message (hexadecimal 04): Receipt of a Disconnect message precedes a legal
disconnect. The Disconnect message is acknowledged but not stored in the receive FIFO, and the
command state code is updated to 7. The command accepts the disconnect message only if it occurs
immediately after the SCSI CDB transfer or after a save-data-pointer message. Reconnection implies
restoration of pointer values; however, since receipt of the save-data-pointer message automatically
saves the transfer counter, no microprocessor intervention is required.
ID Message (hexadecimal 80-FF): An ID message is received following reselection. If the ID message
LUN matches the LUN register, the message is acknowledged but not loaded into the FIFO. The
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