LM10503 Datasheet, PDF (39/43 Pages) Texas Instruments – LM10503 Triple Buck Converter Energy Management Unit (EMU) with PowerWise® 2.0 Adaptive Voltage Scaling (AVS) and ADC

R15 - Comparator Control 1 Register
This register controls the operation of the 4 MFP pins when configured as comparator input pins.
Bit
Field Name Description
7
CMP3DGL
Comparator deglitching circuit for MFP3 pin. 1: four consecutive samples spaced at
6
CMP2DGL
Comparator deglitching circuit for MFP2 pin. ^{intervals defined in register R16, must all}
return the same value before the
comparator data in corresponding
COMP3:0 bit is updated (register R14).
0: four consecutive samples spaced at ~1µs
5
CMP1DGL
Comparator deglitching circuit for MFP1 pin. _{interval, must all return the same value}
before the comparator data in
corresponding COMP3:0 bit is updated
(register R14).
4
CMP0DGL
Comparator deglitching circuit for MFP0 pin.
3
CMP3EN
Comparator enable for MFP3 pin.
2
CMP2EN
Comparator enable for MFP2 pin.
1
CMP1EN
Comparator enable for MFP1 pin.
0
CMP0EN
Comparator enable for MFP0 pin.
The comparator is an edge triggered comparator, i.e. it
checks for the input transition crossing the reference voltage
level. The direction of the transition can be configured by the
polarity bits in register R17. When a transition crossing the
reference is detected, the corresponding comparator tripped
bit in the R14 Interrupt Status Register is set. Once the com-
parator is tripped, the Comparator Enable bit must be set to
‘0’ to reset the comparator logic, and then set to ‘1’ to re-arm
for the next compare.
A number of 4 consecutive samples are required to validate
the tripping after the comparator output changes state. The
sampling interval is configured by the select bits in register
R16. The GPO function must be disabled in order to use the
Multi-Function Pin as a comparator input pin.
R16 - Comparator Control 2 Register
Bit
Field Name
Description
7:6
CMP3DM1:0
Comparator 3 deglitching sampling
interval select
This register controls the deglitching sampling
5:4
CMP2DM1:0
Comparator 2 deglitching sampling ^{interval used for filtering out spurious interrupts}
interval select
generated by the comparators:
00: 1ms
3:2
CMP1DM1:0
Comparator 1 deglitching sampling _{01: 2ms}
interval select
10: 4ms
1:0
CMP0DM1:0
Comparator 0 deglitching sampling _{11: 8ms}
interval select
R17 - Comparator Control 3 Register
This register controls the hysteresis and polarity of the 4 MFP pins when configured as comparator input pins.
Bit
Field Name
Description
7
CMP3HYS
6
CMP2HYS
5
CMP1HYS
4
CMP0HYS
Comparator 3
Comparator 2
Comparator 1
Comparator 0
Hysteresis window select:
1: 60 mV
0: 100 mV
3
CMP3PL
2
CMP2PL
1
CMP1PL
0
CMP0PL
Comparator 3
Comparator 2
Comparator 1
Comparator 0
Polarity select bit:
1: Compare on going up
0: Compare on going down
In both polarity modes the comparator works as an
edge detector: the corresponding input signal must
rise above or fall below the trigger level in order the
activate the interrupt. Once the comparator is
tripped, the enable bit must be set to '0' to reset the
comparator logic, and then set to '1' to re-arm for the
next compare.
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