AMC7836 Datasheet, PDF (39/88 Pages) Texas Instruments – AMC7836 High-Density, 12-Bit Analog Monitor and Control Solution With Multichannel ADC, Bipolar DACs, Temperature Sensor, and GPIO Ports

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AMC7836
SLAS986C – NOVEMBER 2014 – REVISED APRIL 2016
7.4 Device Functional Modes
The sixteen DACs in the AMC7836 device are split into four groups, each with four DACs. The output range and
clamp voltage for each DAC group is set independently which enables the device to operate in one of the
following modes:
• All-positive DAC range mode
• All-negative DAC range mode
• Mixed DAC range mode
7.4.1 All-Positive DAC Range Mode
In the AMC7836 all-positive DAC range mode, each of the four DAC groups is set to a positive voltage output
range (0 to 5 V or 0 to 10 V).
Because the maximum DAC output for each group cannot exceed the common AV_CC voltage for the device
(AV_CC = AV_{CC_AB} = AV_{CC_CD}), a DAC group in the 0 to 10 V output range forces the AV_CC voltage to a value
greater or equal to 10 V even if the remaining DAC groups are set in the 0 to 5 V range. If all DAC groups are
set in the 0 to 5 V range the AV_CC voltage can be set to a value as low as 5 V.
The minimum DAC output for each group cannot be lower than the AV_SS voltage but because the minimum DAC
output is 0 V in the all-positive DAC range mode, all of the AV_SS pins (AV_EE, AV_SSB, AV_SSC, and AV_SSD) as well
as the device thermal pad can be tied to AGND thus simplifying the board design. Table 5 lists the typical
configurations for this mode.
PIN
AV_DD
DV_DD
IOV_DD
AV_{CC_AB}, AV_{CC_CD}
AV_EE
AV_SSB, AV_SSC, AV_SSD
Thermal Pad
Table 5. All-positive DAC Range Mode Typical Configuration
NOTES
TYPICAL CONNECTION
5V
DV_DD must be equal to AV_DD.
IOV_DD must be equal to or less than DV_DD.
The AV_{CC_AB} and AV_{CC_CD} pins must be tied
to the same potential (AV_CC).
AV_CC must be greater or equal than the
maximum possible output voltage for any of
the sixteen DACs.
5V
1.8 V to 5 V
AV_CC ≥ 5 V
AV_CC ≥ 10 V
AGND
AGND
AGND
After power-on or a reset event the output range for each DAC group is set automatically by the voltage present
on the corresponding AV_SS pin. In the all-positive DAC range mode all AV_SS pins are connected to AGND and
consequently all four DAC groups will initialize by default to the 0 to 5 V range. The output for any of the DAC
groups can be modified to the 0 to 10 V range after initialization by setting the corresponding DAC range register
(address 0x1E to 0x1F) to 110b.
In addition to setting the default output range, the AV_SS pins also set the clamp voltage for each DAC group.
Because the clamp voltage is only dependent on the voltage in the AV_SS pin, changes to the DAC range
registers do not affect the clamp setting. With the AV_SS pins connected to AGND, the clamp voltage for all
sixteen DACs is 0 V.
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