TM4C1233E6PZ Datasheet, PDF (386/1242 Pages) Texas Instruments – Tiva Microcontroller

System Control
Register 96: EEPROM Deep-Sleep Mode Clock Gating Control (DCGCEEPROM),
offset 0x858
The DCGCEEPROM register provides software the capability to enable and disable the EEPROM
module in deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock
is disabled to save power.
EEPROM Deep-Sleep Mode Clock Gating Control (DCGCEEPROM)
Base 0x400F.E000
Offset 0x858
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
D0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
D0
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EEPROM Module Deep-Sleep Mode Clock Gating Control
Value Description
0 EEPROM module is disabled.
1 Enable and provide a clock to the EEPROM module in
deep-sleep mode.
386
June 12, 2014
Texas Instruments-Production Data