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TMS320F28030_17 Datasheet, PDF (37/161 Pages) Texas Instruments – Piccolo Microcontrollers
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TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584K – APRIL 2009 – REVISED JUNE 2016
5.12.2 Clock Requirements and Characteristics
NO.
C9
C10
C11
C12
tf(CI)
tr(CI)
tw(CIL)
tw(CIH)
Table 5-8. XCLKIN Timing Requirements - PLL Enabled
Fall time, XCLKIN
Rise time, XCLKIN
Pulse duration, XCLKIN low as a percentage of tc(OSCCLK)
Pulse duration, XCLKIN high as a percentage of tc(OSCCLK)
MIN
45%
45%
MAX
6
6
55%
55%
UNIT
ns
ns
NO.
C9 tf(Cl)
C10 tr(CI)
C11 tw(CIL)
C12 tw(CIH)
Table 5-9. XCLKIN Timing Requirements - PLL Disabled
Fall time, XCLKIN
Rise time, XCLKIN
Pulse duration, XCLKIN low as a percentage of
tc(OSCCLK)
Pulse duration, XCLKIN high as a percentage of
tc(OSCCLK)
Up to 20 MHz
20 MHz to 30 MHz
Up to 20 MHz
20 MHz to 30 MHz
MIN
45%
45%
MAX
6
2
6
2
55%
UNIT
ns
ns
55%
The possible configuration modes are shown in Table 6-17.
Table 5-10. XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)(1) (2)
over recommended operating conditions (unless otherwise noted)
NO.
PARAMETER
MIN
MAX
C3 tf(XCO)
C4 tr(XCO)
C5 tw(XCOL)
C6 tw(XCOH)
Fall time, XCLKOUT
Rise time, XCLKOUT
Pulse duration, XCLKOUT low
Pulse duration, XCLKOUT high
H–2
H–2
5
5
H+2
H+2
(1) A load of 40 pF is assumed for these parameters.
(2) H = 0.5tc(XCO)
C8
XCLKIN(A)
C10
C9
UNIT
ns
ns
ns
ns
C1
XCLKOUT(B)
C3
C4
C6
C5
A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is
intended to illustrate the timing parameters only and may differ based on actual configuration.
B. XCLKOUT configured to reflect SYSCLKOUT.
Figure 5-10. Clock Timing
Copyright © 2009–2016, Texas Instruments Incorporated
Specifications
37
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