AFE4490_14 Datasheet, PDF (36/96 Pages) Texas Instruments – Integrated Analog Front-End for Pulse Oximeters

AFE4490
SBAS602G – DECEMBER 2012 – REVISED JUNE 2014
www.ti.com
8.3.3.1 Using the Timer Module
The timer module registers can be used to program the start and end instants in units of 4-MHz clock cycles.
These timing instants and the corresponding registers are listed in Table 2.
Note that the device does not restrict the values in these registers; thus, the start and end edges can be
positioned anywhere within the pulse repetition period. Care must be taken by the user to program suitable
values in these registers to avoid overlapping the signals and to make sure none of the edges exceed the value
programmed in the PRP register. Writing the same value in the start and end registers results in a pulse duration
of one clock cycle. The following steps describe the timer sequencing configuration:
1. With respect to the start of the PRP period (indicated by timing instant t₀ in Figure 63 and Figure 64), the
sequence of conversions must be followed in order: convert LED2 → LED2 ambient → LED1 → LED1
ambient.
2. Also, starting from t₀, the sequence of sampling instants must be staggered with respect to the respective
conversions as follows: sample LED2 ambient → LED1 → LED1 ambient → LED2.
3. Finally, align the edges for the two LED pulses with the respective sampling instants.
Table 2. Clock Edge Mapping to SPI Registers
TIME INSTANT
(See Figure 63 and
Figure 64)
DESCRIPTION
t₀
Start of pulse repetition period
t₁
Start of sample LED2 pulse
t₂
End of sample LED2 pulse
t₃
Start of LED2 pulse
t₄
End of LED2 pulse
t₅
Start of sample LED2 ambient pulse
t₆
End of sample LED2 ambient pulse
t₇
Start of sample LED1 pulse
t₈
End of sample LED1 pulse
t₉
Start of LED1 pulse
t₁₀
End of LED1 pulse
t₁₁
Start of sample LED1 ambient pulse
t₁₂
End of sample LED1 ambient pulse
t₁₃
Start of convert LED2 pulse
t₁₄
End of convert LED2 pulse
t₁₅
Start of convert LED2 ambient pulse
t₁₆
End of convert LED2 ambient pulse
t₁₇
Start of convert LED1 pulse
t₁₈
End of convert LED1 pulse
t₁₉
Start of convert LED1 ambient pulse
t₂₀
End of convert LED1 ambient pulse
t₂₁
Start of first ADC conversion reset pulse
t₂₂
End of first ADC conversion reset pulse⁽²⁾
t₂₃
Start of second ADC conversion reset pulse
t₂₄
End of second ADC conversion reset
pulse ⁽²⁾
t₂₅
Start of third ADC conversion reset pulse
t₂₆
End of third ADC conversion reset pulse⁽²⁾
t₂₇
Start of fourth ADC conversion reset pulse
t₂₈
End of fourth ADC conversion reset pulse⁽²⁾
t₂₉
End of pulse repetition period
CORRESPONDING REGISTER ADDRESS AND REGISTER BITS
No register control
Sample LED2 start count (bits 15-0 of register 01h)
Sample LED2 end count (bits 15-0 of register 02h)
LED2 start count (bits 15-0 of register 03h)
LED2 end count (bits 15-0 of register 04h)
Sample ambient LED2 start count (bits 15-0 of register 05h)
Sample ambient LED2 end count (bits 15-0 of register 06h)
Sample LED1 start count (bits 15-0 of register 07h)
Sample LED1 end count (bits 15-0 of register 08h)
LED1 start count (bits 15-0 of register 09h)
LED1 end count (bits 15-0 of register 0Ah)
Sample ambient LED1 start count (bits 15-0 of register 0Bh)
Sample ambient LED1 end count (bits 15-0 of register 0Ch)
LED2 convert start count (bits 15-0 of register 0Dh)
Must start one AFE clock cycle after the ADC reset pulse ends.
LED2 convert end count (bits 15-0 of register 0Eh)
LED2 ambient convert start count (bits 15-0 of register 0Fh)
Must start one AFE clock cycle after the ADC reset pulse ends.
LED2 ambient convert end count (bits 15-0 of register 10h)
LED1 convert start count (bits 15-0 of register 11h)
Must start one AFE clock cycle after the ADC reset pulse ends.
LED1 convert end count (bits 15-0 of register 12h)
LED1 ambient convert start count (bits 15-0 of register 13h)
Must start one AFE clock cycle after the ADC reset pulse ends.
LED1 ambient convert end count (bits 15-0 of register 14h)
ADC reset 0 start count (bits 15-0 of register 15h)
ADC reset 0 end count (bits 15-0 of register 16h)
ADC reset 1 start count (bits 15-0 of register 17h)
ADC reset 1 end count (bits 15-0 of register 18h)
ADC reset 2 start count (bits 15-0 of register 19h)
ADC reset 2 end count (bits 15-0 of register 1Ah)
ADC reset 3 start count (bits 15-0 of register 1Bh)
ADC reset 3 end count (bits 15-0 of register 1Ch)
Pulse repetition period count (bits 15-0 of register 1Dh)
(1) Values are based off of a pulse repetition frequency (PRF) = 500 Hz and duty cycle = 25%.
(2) See Figure 64, note 2 for the affect of the ADC reset time crosstalk.
EXAMPLE ⁽¹⁾
(Decimal)
—
6050
7998
6000
7999
50
1998
2050
3998
2000
3999
4050
5998
4
1999
2004
3999
4004
5999
6004
7999
0
3
2000
2003
4000
4003
6000
6003
7999
36
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