TMS320VC5421_17 Datasheet, PDF (35/104 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
3.6 16-Bit Bidirectional Host-Port Interface (HPI16)
The HPI16 is an enhanced 16-bit version of the TMS320C54x DSP 8-bit host-port interface (HPI). The HPI16
is designed to allow a 16-bit host to access the DSP on-chip memory, with the host acting as the master of
the interface.
3.6.1 HPI16 Memory Map
Figure 3−6 illustrates the available memory accessible by the HPI. Neither the CPU nor DMA I/O spaces can
be accessed using the host-port interface.
Hex
00 0000
00 001F
00 0020
00 005F
00 0060
Page 0
Reserved
McBSP
DXR/DRR
MMRegs Only
On-Chip
DARAM A
(32K Words)
Prog/Data
Hex
01 0000
Page 1
On-Chip
Two-Way
Shared
DARAM 0
(32K Words)
Program Only
Hex
02 0000
02 001F
02 0020
02 005F
02 0060
Page 2
Reserved
McBSP
DXR/DRR
MMRegs Only
On-Chip
DARAM B
(32K Words)
Prog/Data
Hex
03 0000
Page 3
On-Chip
Two-Way
Shared
DARAM 2
(32K Words)
Program Only
00 7FFF
00 8000
Subsystem A
01 7FFF
01 8000
Shared 0
02 7FFF
02 8000
Subsystem B
03 7FFF
03 8000
Shared 2
On-Chip
SARAM A
(32K Words)
Data Only
On-Chip
Two-Way
Shared
DARAM 1
(32K Words)
Program Only
On-Chip
SARAM B
(32K Words)
Data Only
On-Chip
Two-Way
Shared
DARAM 3
(32K Words)
Program Only
00 FFFF
Subsystem A
01 FFFF
Shared 1
02 FFFF
Subsystem B
03 FFFF
Shared 3
NOTES: A. All local memory is available to the HPI
B. The encoder maps CPU A Data Page 0 into the HPI Page 0. CPU B Data Page 0 is mapped into the HPI Page 2. Pages 1 and 3
are the on-chip shared program memory.
C. In pages 00 and 02, in the range of 0020−005F, only the following memory mapped registers are accessible: 20,21,30,31,40,41 (read
only), 22,23,32,33,42,43 (write only).
Figure 3−6. Memory Map Relative to Host-Port Interface HPI16
December 1999 − Revised October 2008
SPRS098D
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