THS7376_14 Datasheet, PDF (35/62 Pages) Texas Instruments – 4-Channel Video Amplifier with One SD and Three HD 8th-Order Filters with 6-dB Gain

THS7376
www.ti.com
SBOS692 – JUNE 2013
TEST CIRCUITS
Figure 122 shows the default test condition for the THS7376. R_LOAD is nominally 150 Ω and C_LOAD is nominally
5 pF to account for traditional printed circuit board (PCB) layout parasitics. The input typically comes from either
a video generator (such as a TEK TG700) or other sources (such as a network analyzer, pulse generator, or a
sine-wave generator). Inputs originating from a video generator require a 75-Ω input termination and a dc offset.
Inputs from other sources require a 50-Ω termination and a dc offset (approximately 0.6 VDC). Figure 122 is the
preferred configuration for most testing.
R_SOURCE
V_SOURCE
+
V_BIAS
R_TERM
R_TERM
R_TERM
1 CVBS IN
CVBS OUT 14
2 HD CH1 IN ^{HD CH1 OUT} 13
3 HD CH2 IN HD CH2 OUT 12
4 ^{HD CH3 IN HD CH3 OUT} 11
5 ^GND
VS+ ₁₀
6 ^DISABLE HD BYPASS 9
7 ^NC
NC ₈
R_TERM
To GPIO
Controller Or GND
0.1 mF
22 mF
+3 V to 5 V
Figure 122. Default Test Configuration
C_LOAD
R_LOAD
C_LOAD
R_LOAD
C_LOAD
R_LOAD
C_LOAD
R_LOAD
Figure 123 shows the typical system configuration where long PCB traces between the system-on-a-chip (SOC)
DAC output and the THS7376 are common. On the output, long PCB traces and small capacitors placed near
the connector are common components, and are normally used for electromagnetic interference (EMI)
considerations. These capacitors combine with the device filter response and can help attenuate very high
frequencies. This circuit is useful in understanding the high-frequency roll-off effects resulting from actual system
parasitics typically found in end applications.
CVBS
R
37.4 W
Y’, G’
R
37.4 W
P’_B, B’
P’_R, R’
R
37.4 W
R
37.4 W
75 W
C_STRAY
5 pF
C_STRAY
5 pF
C_STRAY
5 pF
1 CVBS IN
CVBS OUT 14
2 HD CH1 IN ^{HD CH1 OUT} 13
3 HD CH2 IN HD CH2 OUT 12
4 ^{HD CH3 IN HD CH3 OUT} 11
5 ^GND
VS+ ₁₀
6 ^DISABLE HD BYPASS 9
7 ^NC
NC ₈
C_STRAY
5 pF
C_STRAY
5 pF
C_STRAY
5 pF
C
10 pF
75 W
C
10 pF
75 W
C
10 pF
75 W
C_STRAY
5 pF
C_STRAY
5 pF
C
10 pF
To GPIO
+3 V to 5 V
Controller Or GND
Figure 123. Typical System Configuration
CVBS
Out
Y’, G’
Out
P’_B, B’
Out
P’_R, R’
Out
75 W
75 W
75 W
75 W
Copyright © 2013, Texas Instruments Incorporated
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