ADS8865_14 Datasheet, PDF (34/49 Pages) Texas Instruments – 16-Bit, 400-kSPS, Serial Interface, microPower, Miniature, True-Differential Input, SAR Analog-to-Digital Converter

ADS8865
SBAS573A – MAY 2013 – REVISED DECEMBER 2013
www.ti.com
APPLICATION CIRCUIT EXAMPLES
This section describes some common application circuits using the ADS8865. These data acquisition (DAQ)
blocks are optimized for specific input types and performance requirements of the system. For simplicity, power-
supply decoupling capacitors are not shown in these circuit diagrams; refer to the Power Supply section for
suggested guidelines.
DAQ Circuit for a 2.5-µs, Full-Scale Step Response
The application circuit shown in Figure 70 is optimized for using the ADS8865 at the maximum-specified
throughput of 400 kSPS for a full-scale step input voltage. Such step input signals are common in multiplexed
applications when switching between different channels. In a worst-case scenario, one channel is at the negative
full-scale (NFS) and the other channel is at the positive full-scale (PFS) voltage, in which case the step size is
the full-scale range (FSR) of the ADC when the MUX channel is switched.
In such applications, the primary design requirement is to ensure that the full-scale step input signal settles to 16-
bit accuracy at the ADC inputs. This condition is critical to achieve the excellent linearity specifications of the
ADC. Therefore, the bandwidth of the antialiasing RC filter should be large enough to allow optimal settling of the
input signal during the ADC acquisition time. The filter capacitor helps reduce the sampling charge injection at
the ADC inputs, but degrades the phase margin of the driving amplifier, thereby leading to stability issues.
Amplifier stability is maintained by the series isolation resistor. Therefore, the component values of the
antialiasing filter should be carefully selected to meet the settling requirements of the system as well as to
maintain the stability of the input driving amplifiers.
For the input driving amplifiers, key specifications include rail-to-rail input and output swing, high bandwidth, high
slew rate, and fast settling time. The OPA350 CMOS amplifier meets all these specification requirements for this
circuit with a single-supply and low quiescent current.
0.2
10 µF
-
THS4281
++
AVDD
20 k
1 µF
REFERENCE DRIVE CIRCUIT
1 k
1 µF
-
OPA333
++
AVDD
1 k
1 µF
AVDD
REF5045
Vout Vin
Temp
Trim Gnd
1 µF
VIN+
VCM
AVDD
++
OPA350
-
10
1 nF
VIN-
-
OPA350
++
10
AVDD
INPUT DRIVER
AVDD
REF AVDD
AVINP
CONVST
+
ADS8865
AINM
GND
CONVST
16-Bit 400-kSPS
SAR ADC
Figure 70. DAQ Circuit for 2.5-µs, Full-Scale Step Response
For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test
results, using a similar device, refer to 18-Bit Data Acquisition (DAQ) Block Optimized for 1-μs Full-Scale Step
Response (SLAU512).
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