ADS8865_14 Datasheet, PDF (32/49 Pages) Texas Instruments – 16-Bit, 400-kSPS, Serial Interface, microPower, Miniature, True-Differential Input, SAR Analog-to-Digital Converter

ADS8865
SBAS573A – MAY 2013 – REVISED DECEMBER 2013
www.ti.com
ADC INPUT DRIVER
The input driver circuit for a high-precision ADC mainly consists of two parts: a driving amplifier and a fly-wheel
RC filter. The amplifier is used for signal conditioning of the input voltage and its low output impedance provides
a buffer between the signal source and the switched capacitor inputs of the ADC. The RC filter helps attenuate
the sampling charge injection from the switched-capacitor input stage of the ADC and functions as an antialiasing
filter to band-limit the wideband noise contributed by the front-end circuit. Careful design of the front-end circuit is
critical to meet the linearity and noise performance of a high-precision, 16-bit ADC such as the ADS8865.
Input Amplifier Selection
Selection criteria for the input amplifiers is highly dependent on the input signal type as well as the performance
goals of the data acquisition system. Some key amplifier specifications to consider while selecting an appropriate
amplifier to drive the inputs of the ADC are:
• Small-signal bandwidth. Select the small-signal bandwidth of the input amplifiers to be as high as possible
after meeting the power budget of the system. Higher bandwidth reduces the closed-loop output impedance
of the amplifier, thus allowing the amplifier to more easily drive the low cutoff frequency RC filter (refer to the
Antialiasing Filter section) at the inputs of the ADC. Higher bandwidth also minimizes the harmonic distortion
at higher input frequencies. In order to maintain the overall stability of the input driver circuit, the amplifier
bandwidth should be selected as described in Equation 2:
Unity
 Gain
Bandwidth
t
4
u
¨¨©§
2S
u
1
R_FLT
u C_FLT
¸¸¹·
(2)
• Noise. Noise contribution of the front-end amplifiers should be as low as possible to prevent any degradation
in SNR performance of the system. As a rule of thumb, to ensure that the noise performance of the data
acquisition system is not limited by the front-end circuit, the total noise contribution from the front-end circuit
should be kept below 20% of the input-referred noise of the ADC. Noise from the input driver circuit is band-
limited by designing a low cutoff frequency RC filter, as explained in Equation 3.
N_G u
2u
¨§
¨¨©
V₁
f
_ AMP_ PP
6.6
¸·²
¸¸¹

e_{n2 _ RMS} u
S
2
u
f_3dB
d
1
u
V_REF
¨§ ^SNRdB ¸·
u10 ^{© 20 ¹}
52
where:
• V_{1 / f_AMP_PP} is the peak-to-peak flicker noise in µV_RMS,
• e_{n_RMS} is the amplifier broadband noise density in nV/√Hz,
• f_–3dB is the 3-dB bandwidth of the RC filter, and
• N_G is the noise gain of the front-end circuit, which is equal to '1' in a buffer configuration.
(3)
• Distortion. Both the ADC and the input driver introduce nonlinearity in a data acquisition block. As a rule of
thumb, to ensure that the distortion performance of the data acquisition system is not limited by the front-end
circuit, the distortion of the input driver should be at least 10 dB lower than the distortion of the ADC, as
shown in Equation 4.
THD_AMP d THD_ADC  10 dB
(4)
• Settling Time. For dc signals with fast transients that are common in a multiplexed application, the input signal
must settle within a 16-bit accuracy at the device inputs during the acquisition time window. This condition is
critical to maintain the overall linearity performance of the ADC. Typically, the amplifier data sheets specify
the output settling performance only up to 0.1% to 0.001%, which may not be sufficient for the desired 16-bit
accuracy. Therefore, the settling behavior of the input driver should always be verified by TINA™-SPICE
simulations before selecting the amplifier.
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