ADS8681_16 Datasheet, PDF (34/74 Pages) Texas Instruments – 16-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System with Programmable, Bipolar Input Ranges

ADS8681, ADS8685, ADS8689
SBAS633B – FEBRUARY 2016 – REVISED DECEMBER 2016
www.ti.com
7.3.9.1 Input Alarm
The device features a high and a low alarm on the analog input. The alarms corresponding to the input signal
have independently-programmable thresholds and a common hysteresis setting that can be controlled through
the ALARM_H_TH_REG and ALARM_L_TH_REG registers.
The device sets the input high alarm when the digital output exceeds the high alarm upper limit [high alarm
threshold (T)]. The alarm resets when the digital output is less than or equal to the high alarm lower limit [high
alarm (T) – H – 1). This function is shown in Figure 67.
Similarly, the input low alarm is triggered when the digital output falls below the low alarm lower limit [low alarm
threshold (T)]. The alarm resets when the digital output is greater than or equal to the low alarm higher limit [low
alarm (T) + H + 1]. This function is shown in Figure 68.
H_ALARM On
H_ALARM Off
L_ALARM On
L_ALARM Off
(T ± H ± 1) (T)
ADC Output
Figure 67. High ALARM Hysteresis
(T) (T + H + 1)
ADC Output
Figure 68. Low ALARM Hysteresis
7.3.9.2 AVDD Alarm
The device features a high and a low alarm on the analog voltage supply, AVDD. Unlike the input signal alarm,
the AVDD alarm has fixed trip points that are set by design. The device features an internal analog comparator
that constantly monitors the analog supply against the high and low threshold voltages. The high alarm is set if
AVDD exceeds a typical value of 5.3 V and the low alarm is asserted if AVDD drops below 4.7 V. This feature is
specially useful for debugging unusual device behavior caused by a glitch or brown-out condition on the analog
AVDD supply.
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