TLC27L4_14 Datasheet, PDF (33/43 Pages) Texas Instruments – LinCMOSE PRECISION QUAD OPERATIONAL AMPLIFIERS

TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS™ PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
output characteristics (continued)
Although the TLC27L4 and TLC27L9 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (Rb) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of R_P, a voltage offset from 0 V at the output occurs. Second, pullup resistor R_P acts as a drain
load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying
the output current.
VDD
C
VI ₊
IP ^RP
–
VO
Rp =
VDD – VO
IF + IL + IP
IF
IP = Pullup current
required by the
VO
R2
R1
IL _RL
operational amplifier
(typically 500 µA)
Figure 42. Resistive Pullup to Increase V_OH
Figure 43. Compensation for
Input Capacitance
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.
electrostatic discharge protection
The TLC27L4 and TLC27L9 incorporate an internal electrostatic discharge (ESD) protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L4 and
TLC27L9 inputs and outputs were designed to withstand – 100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
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